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title | Design Revision History |
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Date | Vivado | Project Built | Authors | Description |
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2020-03-25 | 2019.2 | TE0726-zynqberrydemo3_noprebuilt-vivado_2019.2-build_8_20200325082001.zip TE0726-zynqberrydemo3-vivado_2019.2-build_8_20200325081946.zip | Mohsen Chamanbaz/John Hartfiel | | 2020-02-20 | 2019.2 | TE0726-zynqberrydemo3_noprebuilt-vivado_2019.2-build_5_20200214101637.zip TE0726-zynqberrydemo3-vivado_2019.2-build_5_20200214101624.zip | Mohsen Chamanbaz | - update with Vivado 2019.2
| 2019-12-19 | 2018.3 | te0726-zynqberrydemo3-vivado_2018.3-build_10_20200114090815.zip te0726-zynqberrydemo3_noprebuilt-vivado_2018.3-build_10_20200114090645.zip | Mohsen Chamanbaz | - update with Vivado 2018.3
| 2019-02-12 | 2018.2 | te0726-zynqberrydemo3-vivado_2018.2-build_04_20190212141216.zip te0726-zynqberrydemo3_noprebuilt-vivado_2018.2-build_04_20190212141236.zip | Oleksandr Kiyenko | - add missing fgrab in petalinux template
| 2018-12-05 | | te0726-zynqberrydemo3-vivado_2018.2-build_03_20181128113130.zip te0726-zynqberrydemo3_noprebuilt-vivado_2018.2-build_03_20181128113146.zip | Oleksandr Kiyenko | |
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title | Known Issues |
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Issues | Description | Workaround | To be fixed version |
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Flash Programming failed with 19.2 | Depending on Flash content Flash programming failed with provided fsbl_flash (Xilinx AR# 70548 )2019.2 version | - Option1:
- In case Flash is empty, use fsbl_flash on programming GUI
- In case Flash is programmed use normal fsbl on programming GUI
- Option2: use in both case fsbl_flash on programming GUI and Vivado LabTools 2018.3
| No known issues | --- | --- | --- |
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Requirements
Software
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Notes : - list of software which was used to generate the design
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For general structure and of the reference design, see Project Delivery - Xilinx AMD devices
Design Sources
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Type | Location | Notes |
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Vivado | <design name>/block_design <design name>/constraints <design name>/ip_lib | Vivado Project will be generated by TE Scripts | Vitis | <design name>/sw_lib | Additional Software Template for Vitis and apps_list.csv with settings automatically for Vitis app generation | PetaLinux | <design name>/os/petalinux | PetaLinux template with current configuration |
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Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.
See also:
The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.
TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also be executed by Xilinx Vivado/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality
- _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
- Press 0 and enter to start "Module Selection Guide"
- (optional Win OS) Generate Virtual Drive or use short directory for the reference design (for example x:\<design name>)
- Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
- (optional for manual changes) Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
Note: Select correct one, see TE Board Part Files
- Create HDF and export to prebuilt folder
- Run on Vivado TCL: TE::hw_build_design -export_prebuilt
Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
- Create Linux (uboot.elf and image.ub) with exported XSA
- XSA is exported to "prebuilt\hardware\<short name>"
Note: HW Export from Vivado GUI create another path as default workspace. - Create Linux images on VM, see PetaLinux KICKstart
- Use TE Template from /os/petalinux
- For 128MB and 64MB only:Netboot Offset must be reduced manually, see 68616202
- Add Linux files (uboot.elf and image.ub) to prebuilt folder
- "prebuilt\os\petalinux\<DDR size>" or "prebuilt\os\petalinux\<short name>"
Notes: Scripts select "prebuilt\os\petalinux\<short name>", if exist, otherwise "prebuilt\os\petalinux\\<DDR size>"
- Generate Programming Files with Vitis
- Run on Vivado TCL: TE::sw_run_vitis -all
Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv" - (alternative) Start Vitis with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_vitis
Note: TCL scripts generate also platform project, this must be done manuelly in case GUI is used. See Vitis
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Xilinx documentation for programming and debugging: Vivado/SDK/SDSoC-Xilinx Software Programming and Debugging
Get prebuilt boot binaries
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- Connect JTAG and power module (TE0726 can be powered via JTAG USB or external)
- Open Vivado Project with "vivado_open_existing_project_guimode.cmd" or if not created, create with "vivado_create_project_guimode.cmd"
- Type on Vivado TCL Console: TE::pr_program_flash _binfile -swapp u-boot
Note: To program with SDK/Vivado GUI, use special FSBL (zynqmp_fsbl_flash) on setup
optional "TE::pr_program_flash _binfile -swapp hello_te0726" possible - Build Image.ub in Petalinux
- Copy the Petalinux image.ub on SD-Card
- For correct prebuilt file location, see <design_name>/prebuilt/readme_file_location.txt
- Copy init.sh on SD-Card
- Location : <design-name>/misc/sd/
- Insert SD-Card
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title | Document change history. |
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orientation | portrait |
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Date | Document Revision | Authors | Description |
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Page info |
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| modified-date |
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| modified-date |
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dateFormat | yyyy-MM-dd |
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infoType | Current version |
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dateFormat | yyyy-MM-dd |
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prefix | v. |
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type | Flat |
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infoType | Modified by |
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type | Flat |
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| - typo
- Programming issue note
| 2020-03-25 | v.14 | John Hartfiel | | 2020-02-20 | v.13 | Mohsen Chamanbaz | | 2020-01-14 | v.11 | Mohsen Chamanbaz | | 2019-02-12 | v.10 | John Hartfiel | - design linux source update
| | v.7 | John Hartfiel | | -- | all | Page info |
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infoType | Modified users |
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dateFormat | yyyy-MM-dd |
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type | Flat |
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