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Overview

The Trenz Electronic TE0xxx-xx ... is an industrial-grade ... module ... based on Xilinx ..TEM0005-02 is a low-cost module with Microsemi SmartFusion2 SoC and 32 MByte flash memory for configuration and operation. SmartFusion2 combines a 166 MHz Cortex-M3 MCU with 256 KByte Flash and 80 KByte SRAM as well as 12 kLUT FPGA Core Logic.

Refer to http://trenz.org/tec0850tem0005-info for the current online version of this manual and other available documentation.

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Note:
 'description: Important components and connector or other Features of the module
→ please sort and indicate assembly options

Key Features'  must be split into 6 main groups for modules and mainboards:

  • SoC/FPGA
    • Package: SFVC784
    • Device: ZU2...ZU5*
    • Engine: CG, EG, EV*
    • Speed: -1LI, -2LE,*, **
    • Temperature: I, E,*, **
  • RAM/Storage
    • Low Power DDR4 on PS
      • Data width: 32bit
      • Size: def. 2GB*
      • Speed:***
    • eMMC
      • Data width: 8Bit
      • size: def. 8GB *
    • QSPI boot Flash in dual parallel mode (size depends on assembly version)
      • Data width: 8bit
      • size: def. 128MB *
    • HyperRAM/Flash (optional, default not assembled)
      • size:*
    • MAC address serial EEPROM with EUI-48™ node identity (Microchip 24AA025E48)
  • On Board
    • Lattice LCMXO2
    • PLL SI5338
    • Gigabit Ethernet transceiver PHY (Marvell Alaska 88E1512)
    • Hi-speed USB2 ULPI transceiver with full OTG support (Microchip USB3320C)
  • Interface
    • 132 x HP PL I/Os (3 banks)
    • ETH
    • USB
    • 4 GTR (for USB3, Sata, PCIe, DP)
    • MIO for UART
    • MIO for SD
    • MIO for PJTAG
    • JTAG
    • Ctrl
  • Power
    • 3.3V-5V Main Input
    • 3.3V Controller Input
    • Variable Bank IO Power Input
  • Dimension
    • 4 cm x 5 cm
  • Notes
    • * depends on assembly version
    • ** also non low power assembly options possible
    • *** depends on used U+ Zynq and DDR4 combination


Key Features'  must be split into 6 main groups for carrier:

  • Modules
    • TE0808, TE807, TE0803,...
  • RAM/Storage
    • E.g. SDRAM, SPI
  • On Board
    • E.g. CPLD, PLL
  • Interface
    • E.g. ETH, USB, B2B, Display port
  • Power
    • E.g. Input supply voltage
  • Dimension


  • SoC/FPGA
    • Package: VFG400
    • Device: M2S010, M2S050 *
    • Engine: 166Mhz 32Bit ARM Cortex-M3
    • Speed: Standard
    • Temperature: C, I*
    <Replace for module use "SoC/FPGA" for Carrier "Modules">
    • ...
  • RAM/Storage
    • ...
  • On Board
    • ...
  • Interface
    • ...
  • Power
    • ...
  • Dimension
    • ...
    • Low Power DDR3
      • Data width: 16bit
      • Size: def. 2Gb
    • SPI Flash
      • size: 256 M bit 
    • 2Kb EEPROM
  • On Board
    • Crypto Authentication IC
    • Voltage monitor IC
    • 10/100 Mbps PHY Ethernet
  • Interface
    • Samtec ST5 B2B Connector
  • Power
    • 3.3V supplied from carrier
  • Dimension
    • 56 x 31 mm
  • Notes
    • * depends on assembly version
    Notes
    • ...

Block Diagram

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Note

For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .


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titleTExxxx TEM0005 block diagram


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Main Components

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Notes :

  • Picture of the PCB (top and bottom side) with labels of important components
  • Add List below
Note

For more information regarding how to add board photoes, Please refer to "Diagram Drawing Guidline" .

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anchorFigure_OV_MC
titleTExxxx main components
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Main Components

  1. ...
  2. ...
  3. ...

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Notes :

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty
  • Picture of the PCB (top and bottom side) with labels of important components
  • Add List below


Note

For more information regarding how to add board photoes, Please refer to "Diagram Drawing Guidline" .



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titleInitial delivery state of programmable devices on the moduleTEM0005 main components


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Storage device name

Content

Notes

Quad SPI Flash

EEPROMSystem Controller CPLD

Configuration Signals

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  • Overview of Boot Mode, Reset, Enables.
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  1. Microsemi SmartFusion2 SoC, U2
  2. Dual DCDC Regulator, U7
  3. EEPROM, U4
  4. 10/100 Mb Ethernet, U1
  5. QSPI Flash, U3
  6. Authentication IC, U6
  7. DDR3 Memory, U5
  8. B2B Connector, J1

Initial Delivery State

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Notes :

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty


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titleBoot process.Initial delivery state of programmable devices on the module

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Storage device name

Content

Notes

Quad SPI Flash

Not Programmed


EEPROMNot Programmed


CryptoAuthenticationNot Programmed


Configuration Signals

  • Boot Mode, Reset, Enables.
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  • Overview of

MODE Signal State


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titleReset process.

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Signal

B2BI/ONote
RESET


J1-11
Active low reset 


Signals, Interfaces and Pins

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FPGA bank number and number of I/O signals connected to the B2B connector:, J1.

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titleGeneral PL I/O to B2B connectors information

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FPGA Bank
B2B Connector
InterfaceI/O Signal CountVoltage LevelNotes

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JTAG access to the TExxxx SoM through B2B connector JMX.

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titleJTAG pins connection

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JTAG Signal

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B2B Connector

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Bank 1GPIO8x Single Ended3.3V
UART4x Single Ended3.3V
I2C2x Single Ended3.3V
GOLDEN1x Single Ended3.3V
Bank 2ULPI/I/O12x Single Ended3.3V
I2C2x Single Ended3.3V
GPIO10x Single Ended 3.3V
SC SPI4x Single Ended3.3V
SPI17x Single Ended3.3V
Bank 3JTAG5x Single Ended3.3V
Reset 1x Single Ended3.3V
Bank 4I/O24x Single Ended/12 LVDS pairs3.3V
Bank 6I/O28x Single Ended/14 LVDS pairsVDDI6max 2.5V
Bank 7I/O4x Single Ended3.3V



JTAG Interface

JTAG access to the TEM0005 SoM through B2B connector J1.

MIO Pins

you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

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MIO PinConnected toB2BNotes
MIO12...14

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

J2QSPI
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titleMIOs JTAG pins connection

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MIO PinConnected toB2BNotes

Test Points

JTAG Signal

B2B Connector

TMSJ1-14
TDIJ1-8
TDOJ1-10
TCK

J1-12

TRSTJ1-7


Test Points

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you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section.

Example:

Test PointSignalB2BNotes
10PWR_PL_OKJ2-120


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titleTest Points Information

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Test PointSignalConnected toNotes
TP1CLKOUTRegulator, U7


On-board Peripherals

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs

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titleOn board peripherals

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Chip/InterfaceDesignatorNotes
QSPIU3
DDR3L SDRAMU5
EEPROMU4
Authentication ICU6
Ethernet PHYU1
OscillatorsY3


(Quad) SPI Flash Memory

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Notes :

Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options.

The TEM0005 is equipped with a (Q)SPI flash memory, U3 provided in order to store data and configuration. 

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titleQuad SPI interface MIOs and pins

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MIO PinSchematicU?? U3 PinConnected toNotes

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SPI0_SS0nCEFPGA Bank 2
SPI0_CLKSCKFPGA Bank 2
SPI0_SDOSI/IO0FPGA Bank 2
SPI0_SDISO/IO0FPGA Bank 2


EEPROM

The TEM0005 is equipped with an EEPROM IC, U4. The I2C signals are connected to authentication IC as well.

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titleI2C EEPROM interface MIOs and pins

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titleI2C interface MIOs and pins

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MIO Pin
Schematic
U?
U4 PinNotes
I2C0_SCLSCL
I2C0_SDASDA



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titleI2C Address address for RTCEEPROM

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MIO Pin
 PinI2C AddressDesignatorNotes

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SCL/SDA0x70U4


Authentication IC

There is an Authentication IC ATECC608A provided on TEM0005, The IC is connected to I2C0 bus.

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titleI2C EEPROM interface MIOs and pinsAuthentication IC information

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MIO Pin
 PinSchematic
U?? Pin
Notes
SCLI2C0_SCLSerial Clock
SDAI2C1_SCLSerial Data



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titleI2C address for EEPROMAuthentication IC

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MIO Pin PinI2C AddressDesignatorNotes

LEDs

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titleOn-board LEDs
SCL/SDA0xC0U6This is the default value, which can be changed, see device datasheet.


DDR3L SDRAM

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Notes

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DDR3 SDRAM

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Notes :

Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3)

The TE???? TEM0005 SoM has ??? GByte volatile DDR3 2 Gb volatile DDR3L SDRAM IC for storing user application code and data.

  • Part number:  IS43TR16128CL-125KBLI
  • Supply voltage: 1.5 V
  • Speed: 
  • NOR Flash
  • Temperature: 

...

  • Temperature: -40 to 95 °C

Ethernet Transceiver

On board 10/100 Mbps Ethernet Transceiver U1 is provided on the module TEM0005. 

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titleEthernet PHY to Zynq SoC connections

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U??
U1 Pin Signal NameConnected to
Signal DescriptionNote

CAN Transceiver

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anchorTable_OBP_CAN
titleCAN Tranciever interface MIOs

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Note
RXM/RXPETH1_RXB2B, J1
TXM/TXPETH1_TXB2B, J1
LED0/NWAYENETH1_LED0B2B, J1
LED1/SPEEDETH1_LED1B2B, J1
MDIOETH1_MDIOFPGA Bank 7, U2
MDCETH1_MDCFPGA Bank 7, U2
REXT-GND
INTRPETH1_INTRPFPGA Bank 7, U2
XO/XI-Crystal Oscillator, Y3
nRSTETH1_RSTFPGA Bank 7, U2
CONFIG0...2ETH1_COL/CRC/RXDVFPGA Bank 7, U2
TXCETH1_TXCFPGA Bank 7, U2
TXENETH1_TXENFPGA Bank 7, U2
TXD0...3ETH1_TXD0...3FPGA Bank 7, U2
RXD0...3ETH1_RXD0...3FPGA Bank 7, U2
RXCETH1_RXCFPGA Bank 7, U2
RXCERETH1_RXCERFPGA Bank 7, U2



Clock Sources

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titleOsillators

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titleOsillators

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Programmable Clock Generator

There is a programmable clock generator on-board (U??) provided in order to generate variable clocks for the module. Programming can be done using I2C via PIN header J??.  The I2C Address is 0x??.

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titleProgrammable Clock Generator Inputs and Outputs

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U?? Pin
SignalConnected toDirectionNote

IN0

IN1IN2IN3

XAXB

SCLKSDAOUT0OUT1OUT2OUT3OUT4OUT5OUT6OUT7OUT8/OUT9
DesignatorDescriptionFrequencyNote
Y3Crystal Oscillator25 MHzConnected to ETH PHY