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Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de/display/PD/SC-CPLD-Firmware



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Table of contents

Table of Contents
outlinetrue

Overview

Firmware for PCB-Master CPLD with designator U17. First CPLD Device in Chain: LCMX02-1200HC

Feature Summary

  • FMC VADJ Power
  • JTAG / FMC JTAG / PJTAG
  • RESET/Enable Management
  • LED
  • RGPIO
  • SD
  • CAN
  • USB
  • DisplayPort

Firmware Revision and supported PCB Revision

See Document Change History

Product Specification

Port Description

Schematic /Souce Code NameDirectionPinDescriptionPCB REV2 Exception
C_T1 24
 
/ currently_not_usedNC
C_T2 26
 
/ currently_not_usedNC
C_T3 25
 
/ currently_not_usedNC
C_TCK        
 
 in131
 
JTAG J28 (XMOD2) / FMC JTAG
 
C_TDI        
 
 in136
 
JTAG J28 (XMOD2) / FMC JTAG 
C_
TDO1       
TDO      
 
out137
 
JTAG J28 (XMOD2) / FMC JTAG 
C_TMS        
 
in130
 
JTAG J28 (XMOD2) / FMC JTAG 
CAN_FAULT    in106
 
CAN 
CAN_RX       in107
 
CAN 
CAN_S        out105
 
CAN 
CAN_TX       out104
 
CAN 
CLK_125MHZ / PHY_CLKin70
 
/ currently_not_used 
CON_NTRST     117
 
/ currently_not_used 
CON_RTCK / JTAG_RTCK    out125
 
JTAG, Connector J30 
CON_SRST / JTAG_SRSTin127
 
JTAG, Connector J30 
CON_TCK / JTAG_TCKin122
 
JTAG, Connector J30 / PJTAG0 
CON_TDI / JTAG_TDIin119
 
JTAG, Connector J30 / PJTAG0 
CON_TDO / JTAG_TDOout126
 
JTAG, Connector J30 / PJTAG0 
CON_TMS / JTAG_TMSin121
 
JTAG, Connector J30 / PJTAG0 
DIR_T1 23
 
/ currently_not_usedNC
DIR_T2 28
 
/ currently_not_usedNC
DIR_T3 27
 
/ currently_not_usedNC
DP_AUX_DE   / DP_DE out92
 
Display Port 
DP_AUX_RX   / DP_RXin91
 
Display Port 
DP_AUX_TX    / DP_TXout93
 
Display Port 
DP_EN        out77
 
Display Port 
DP_TX_HPD  /DP_HDP in94
 
Display Port 
ETH_RST      out62
 
Ethernet 
EX_IO1        112
 
PMOD / currently_not_used 
EX_IO2        113
 
PMOD / currently_not_used 
EX_IO3        114
 
PMOD / currently_not_used 
EX_IO4        115
 
PMOD / currently_not_used 
F2_EN         19
 
FAN J35 / currently_not_usedNC
F2PWM         20
 
FAN J35 / currently_not_usedNC
F2SENSE       21
 
FAN J35 / currently_not_usedNC
FMC_CLK_DIR  in73
 
FMC 
FMC_TCK      out95
 
FMC 
FMC_TDI      out96
 
FMC 
FMC_TDO      in97
 
FMC 
FMC_TMS      out98
 
FMC 
FMC_VID0     out139
 
FMC VADJ Power Selection 
FMC_VID1     out140
 
FMC VADJ Power Selection 
FMC_VID2     out141
 
FMC VADJ Power Selection 
GND 84REV03 unconnected / currently_not_usedUSB_TRST, other USB HUB
HDIO_SC10 / SC10 inout60
 
FPGA / DP_RX or 'Z' 
HDIO_SC11 / SC11  in59
 
FPGA / DP_DE 
HDIO_SC12 / SC12out58
 
FPGA / DP_HPD 
HDIO_SC13 / SC13out57
 
FPGA / RGPIO TX 
HDIO_SC14 / SC14  in56
 
FPGA / RGPIO RX 
HDIO_SC15 / SC15in55FPGA / RGPIO CLK 
HDIO_
SC16    
SC16 / SC16   in
 
54
 
FPGA / CAN_S 
HDIO_
SC17    
SC17 / SC17
 
in52FPGA / XMOD LED  
HDIO_SC18 / SC18in68
 
FPGA / CAN_TX 
HDIO_SC19 / SC19
in
out69
 
FPGA / CAN_RX 
I2C_RST      
 
out61
 
I2C 
JTAGENB       120external Pin for CPLD Firmware Update  
LED_1A / JLED1out109
 
USB3.0 LED Jellow 
LED_2A / JLED2Aout111
 
USB3.0 LED Green/Orange 
LED_2B / JLED2Bout110
 
USB3.0 LED Green/Orange 
MIO26        in41
 
MIO / PJTAG 
MIO27        in40
 
MIO / PJTAG 
MIO28        in39
 
MIO  / PJTAG 
MIO29        in38
 
MIO  / PJTAG 
OCLK
_EN      
_EN  / OSC_EN   out74
 
Programmable Oscillator U45 
PHY_CONFIG   out65
 
ETH PHY 
PHY_LED0     in67
 
ETH PHY 
PHY_LED1     in86
 
ETH PHY 
PHY_LED2     in85
 
ETH PHY 
SC_CLK0 / CLK0    in76
 
/ currently_not_usedSC_CLK_P
SC_CLK1 / CLK1    in75
 
/ currently_not_usedSC_CLK_N
SC_IO0 / X0in50
 
Master-Slave SC-Communication / Power Reset 
SC_IO1 / X1      in49
 
Master-Slave SC-Communication / Power Reset 
SC_IO2 / X2in48Master-Slave SC-Communication / currently_not_used  
SC_IO3 / X3in47
 
Master-Slave SC-Communication / currently_not_used 
SC_IO4  / X4    out45Master-Slave SC-Communication / SD WP to Slave CPLD  
SC_IO5 / X5     out44
 
Master-Slave SC-Communication / currently_not_used 
SC_IO6 / X6out43
 
Master-Slave SC-Communication / Sanity check to other CPLD (FMC VADJ Enable) 
SC_IO7 / X7out42
 
Master-Slave SC-Communication / Sanity check to other CPLD (FMC VADJ Enable) 
SC_IO8        22
 
Master-Slave SC-Communication / currently_not_usedNC
SC_SCL  / SCL    in14
 
I2C Mux U27 / currently_not_used 
SC_SDA / SDA      in13
 
I2C Mux U27 / currently_not_used 
SC2_SW3 / SW3    in6
 
DIP-Switch S5-3 
SC2_SW4 / SW4    in5
 
DIP-Switch S5-4 
SD_WP        in100MMC SD  
SFP_LED1 / SFP_LED0out81
 
SFP 
SFP_LED2 / SFP_LED1out82
 
SFP 
SFP_LED3 / SFP_LED2out78
 
SFP 
SFP_LED4 / SFP_LED3out83
 
SFP 
SFP1_LOS      32
 
SFP / currently_not_usedNC, controlled by FPGA
SFP1_TX_DIS  out33
 
SFPNC, controlled by FPGA
SFP2_LOS      35
 
SFP / currently_not_usedNC, controlled by FPGA
SFP2_TX_DIS  out34
 
SFPNC, controlled by FPGA
STAT_LED0 / LED0 99LED D4 Green  
STAT_LED1 / LED1 128LED D1 Red  
USB0
_RST     
_RST / USB_RST   out71
 
USB (U9) PHY ResetUSB PHY and HUB Reset
 
USBH_LED_G3   11
 
USB Hub (U4) / currently_not_usedNC, other USB HUB
USBH_LED_G4   12
 
USB Hub (U4) / currently_not_usedNC, other USB HUB
USBH_LED_SS1  9
 
USB Hub (U4) / currently_not_usedNC, other USB HUB
USBH_LED_SS2 / dummyout133
 
USB Hub (U4) Dummy Signal / currently_not_usedNC, other USB HUB
USBH_LED_SS3  132
 
USB Hub (U4) / currently_not_usedNC, other USB HUB
USBH_LED_SS4  138
 
USB Hub (U4) / currently_not_usedNC, other USB HUB
USBH_MODE0   out142
 
USB Hub (U4)NC, other USB HUB
USBH_MODE1   out143
 
USB Hub (U4)NC, other USB HUB
USBH_RST     out10
 
USB Hub (U4)NC, other USB HUB
XMOD1_A       3
 
J28 (XMOD 2) / currently_not_used 
XMOD1_B       2
 
J28 (XMOD 2) / currently_not_used 
XMOD1_E   /XMOD_
E      
E out4
 
J28 (XMOD 2 LED) 
XMOD1_
G      
G / XMOD_G  in1
 
J28 (XMOD 2 Button) 

 

Functional Description

JTAG

JTAGENB set carrier board CPLD into the chain for firmware update. For Update set DIP S4-3 to ON.

FMC JTAG is connected to XMOD2 JTAG. Set DIP S4-3 to OFF for FMC access.

PJTAG (MIO29..26) is connected to JTAF Pinheader J30.

Power

FMC VADJ is 1.8V if S5-4 is ON else 1.2V.

Reset

Main Reset is send by Slave CPLD via X0, X1 Pins.

USB PHY hold ~0,6s after Main Reset or XMOD_G Reset or inv.RGPIO Bus Pin 0 (if active).

USB HUB hold ~0,25s after Main Reset or XMOD_G Reset or inv. RGPIO Bus Pin 0 (if active). Long delay is a BUGFIX: is currently need to start Linux before Reset is disabled.

I2C Reset is Main Reset  or inv. RGPIO Bus Pin 2 (if active).

ETH Reset is  Main Reset  or inv. RGPIO Bus Pin 3 (if active).

Enable

FMC VADJ Enable is set from Slave CPLD via Saity Check (X6, X7).

SFP1 and SFP2 are always enabled.

Oscillator U45 is enabled

USB

USB Hub Device Operation Mode (USBH_MODEx Pins) are set to internal ROM configuration. Can be controlled by RGPIO Bus Pin 4 and 5.

ETH

PHY Address is 1.

Display Port

SC10 is controlled by DP_RX when SC11 is zero else high impedance state. DP_TX controlled by SC10 and DP_DE controlled by SC11.SC12 is controlled by DP_HPD.

CAN

CAN_TX soured by SC18.

SC19 sourced by CAN_RX.

CAN_S sourced by S16.

SD

SD WP is forwarded to Slave CPLD.

RGPIO

RGPIO Pin to FPGAValue
0SW3
1SW4
2SD_WP
3XMOD_G
4'0'
5'0'
6'0'
7'0'
8CAN_FAULT
9PHY_LED0
10PHY_LED1
11PHY_LED2
12FMC_TDO
13FMC_CLKDIR
14JTAG_TRST
15JTAG_SRST
16'0'
17'0'
18'0'
19DP_HPD
20SDA
21SCL
22-23unused zero
24-27reserved
28-31Interface detection


RGPIO Pin from FPGAValue
0not USB_RST
1not USBH_RST
2not I2C_RST
3not ETH_RST
4not USBH_MODE0
5not USBH_MODE1
6LED0
7LED1
8SFP_LED0
9SFP_LED1
10SFP_LED2
11SFP_LED3
12JLED1
13JLED2A
14JLED2B
15-23unused
24-27reserved
28-31Interface detection

 

LED

NameDescription
LED0 D4 GreenRGPIO (6) when active else USB HUB RSTN
LED1 D1 RedRGPIO (7) when active else Main Reset from Slave CPLD
SFP_LED0 RedRGPIO (8) when active else blinking when PCB power is on and reset Button is pressed else off
SFP_LED1 GreenRGPIO (9) when active else blinking when PCB power is on and reset Button is pressed else off
SFP_LED2 RedRGPIO (10) when active else blinking when PCB power is on and reset Button is pressed else off
SFP_LED3 GreenRGPIO (11) when active else blinking when PCB power is on and reset Button is pressed else off
JLED1 YellowRGPIO (12) when active else blinking when PCB power is on and reset Button is pressed else not PHY_LED0 when X1 is zero else off
JLED2A GreenRGPIO (13) when active else blinking when PCB power is on and reset Button is pressed else not PHY_LED1 when X1 is zero else on
JLED2B OrangeRGPIO (14) when active else blinking when PCB power is on and reset Button is pressed else off
XMOD_E RedBlinking when Main Power Reset else SC17

*Blinking: ~1,5Hz

Appx. A: Change History

...

Revision Changes

CPLD REV05 to REV06

  • BUGFIX: renamed SC19 to SC17
  • Connect FMC JTAG to XMOD2 JTAG
  • Connect PJTAG0 (MIO29..26) to JTAG Pin Header J30
  • Connect CAN to PL
  • RGPIO Pin changes

CPLD REV04 to REV05

  • SD WP
  • XMOD LED access over PL

Older Revision (PCB REV03) to CPLD REV04

  • Fix USB HUB Mode default state over RGPIO
  • Invert JLED2B over RGPIO

Older Revision (PCB REV02) to CPLD REV04

  • Add all functionality from older Revision (PCB REV03)

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

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DateDocument RevisionCPLD Firmware RevisionSupported PCB RevisionAuthorsDescription

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REV04REV06(REV02 Special Firmware!), REV03,REV04

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user
modified-user

  • small Update Pinout Table
2017-10-18

v.25

REV06(REV02 Special Firmware!), REV03,REV04John Hartfiel
  • Revision  06 finished

2017-06-20

v.23

REV05(REV02 Special Firmware!), REV03,REV04John Hartfiel
  • Document Bugfix, XMOD LED is connected to SC17
2017-06-12v.22REV05(REV02 Special Firmware!), REV03,REV04John Hartfiel
  • Port description update
2017-06-09v.21REV05(REV02 Special Firmware!), REV03,REV04John Hartfiel
  • Revision  05 finished
2017-06-08v.17REV04(REV02 Special Firmware!), REV03,REV04John Hartfiel
  • document style update
2017-03-10v.15REV04(REV02 Special Firmware!), REV03,REV04John Hartfiel
  • Revision 04 finished
2016-12-14

v.1

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Appx. B: Legal Notices

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