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  • On Board
    • MAX10 CPLD
    • 2 phase current measurement
    • DC_LINK voltage measurement
    • 4x LEDs (2 power indicator, 2 user)
    • 2x Pushbutton
    • EEPROM
  • Interface
    • 4 phase screw terminal motor connector
    • CRUVI for control
      • 1x high speed connector 1 low speed connector
    • 6x1 pin header for single ended sensors
    • 5x2 pin header for differential sensors
  • Power
    • screw terminal for up to 40 V DC motor supply
  • Dimension
    • 131 mm x 68.35 mm

...

Scroll Title
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titleCR00140 block diagram


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Main Components

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titleCR00140 main components


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  1. Motor connector screw terminal, J8
  2. Power supply screw terminal, J7
  3. 5x2 pinheader, base for TEI0004 JTAG programmer, J10
  4. 5x2 pinheader for sensor selection, J3
  5. 6x1 pinheader for single ended sensors, J1
  6. 5x2 pinheader for differential sensors, J2
  7. User push buttons, S1, S2
  8. User LEDs, D1, D2
  9. LED DC_Link, D4
  10. LED Power Good, D3
  11. DCDC for 15V, U1
  12. DCDC for 5V, U2
  13. half bridge drivers, U8, U9, U10, U11
  14. MAX10 CPLD, U25
  15. CRUVI high speed connectorCRUVI low speed connector
  16. ADCs, U3, U5, U7
  17. Shunt resistors, R22, R28

...

Scroll Title
anchorTable_SIP_B2B
titleGeneral PL I/O to B2B connectors information

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CPLD BankB2B ConnectorI/O Signal CountVoltage LevelNotes
3J912 x LVDS / 24 I/OsVADJ6 x RX + 6 x TX
3J94 I/OsVADJ
8J94 I/Os3.3VConstant 3.3V
1BJ95 I/Os3.3VJTAG, JTAGEN, Constant 3.3V8J118 x I/Os3.3V Constant 3.3V



JTAG Interface

JTAG access to the CPLD of CR00140 is possible via the CRUVI high speed connector J9 and the pinheader J10, which is a base for TEI004 JTAG programmer. The JTAGEN signal is pulled up and available on J9 only. If JTAGEN is pulled low, the four signals can be used as user I/Os.

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titleJTAG pins connection

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JTAG Signal

B2B Connector

Pin headerNotes
TMSJ9-55J10-5pull up
TDIJ9-51J10-9pull up
TDOJ9-53J10-3-
TCK

J9-59

J10-1pull down
JTAGEN J9-57-high for enable JTAG port of CPLD, low for user I/Os, pull up
UART_RX-J10-7CPLD Firmware dependent, see Firmware
UART_TX-J10-8CPLD Firmware dependent, see Firmware
RST-J10-6CPLD Firmware dependent, see Firmware
+3.3V_DJ9-4, J9-9J10-4-
DGNDseveral, see CRUVIJ10-2, J10-10-


...

For the connection to a control unit, the CRUVI interface is implemented. One high speed connector J9 and one low speed connector J11 are is assembled. The connectors are further described in section B2B Connectors. The connection of the signals and the voltage levels is described in the CPLD section.

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titleCRUVI signals

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Signal

 Connector - Pin

X0

J11-3
X1J11-5
X2J11-7

X3

J11-9
X4J11-4
X5J11-10
X6J11-1
X7J11-2
DGNDDGND

J11-6,

J9-12, J9-18, J9-24, J9-30, J9-42, J9-48, J9-54, J9-13, J9-19, J9-25, J9-31, J9-37, J9-43, J9-49

+3.3V_D

J11-8, J9-4, J9-9
+5.0V_DJ11-12, J9-60
VADJJ9-36
A0_PJ9-14
A0_NJ9-16
A1_P

J9-20

A1_NJ9-22
A2_PJ9-26
A2_NJ9-28
A3_PJ9-32
A3_NJ9-34
A4_PJ9-38
A4_NJ9-40
A5_PJ9-44
A5_NJ9-46
B0_PJ9-15
B0_NJ9-17
B1_PJ9-21
B1_NJ9-23
B2_PJ9-27
B2_NJ9-29
B3_PJ9-33
B3_NJ9-35
B4_PJ9-39839
B4_NJ9-41
B5_PJ9-45
B5_NJ9-47
HSIOJ9-2
HSOJ9-6
RESETJ9-8
HSIJ9-10

TDI

J9-51
TDOJ9-53
TMSJ9-55
JTAGENJ9-57
TCKJ9-59
SMB_ALERTJ9-3
SMB_SDAJ9-5
SMB_SCLJ9-7
REFCLKJ9-11


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titleOn-board LEDs

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X0B93X1A85X2A77X3A69F6JTAG / user IO TMSG1JTAG / user IO JTAGENE5J957J9-5SMB_SCLH4J9-7
Signal nameSC CPLD PinCPLD BankConnected toFunctionNotes
A0_PJ883J11J9-14CPLD firmware dependentSee CPLD Firmware
A0_NK883J11J9-16CPLD firmware dependentSee CPLD Firmware
A1_PM1383J11

J9-

20

CPLD firmware dependentSee CPLD Firmware
A1_NM1283J11J9-22CPLD firmware dependentSee CPLD Firmware
X4A2_PD8M983J11J9-426CPLD firmware dependentSee CPLD Firmware
X5A2_NB6M883J11J9-1028CPLD firmware dependentSee CPLD Firmware
X6A3_PC9N883J11J9-132CPLD firmware dependentSee CPLD Firmware
X7A3_NE8N783J11J9-234CPLD firmware dependentSee CPLD Firmware
A0A4_PJ8M73J9-1438CPLD firmware dependentSee CPLD Firmware
A0A4_NK8N63J9-1640CPLD firmware dependentSee CPLD Firmware
A1A5_PM13K53J9-2044CPLD firmware dependentSee CPLD Firmware
A1A5_NM12J53J9-2246CPLD firmware dependentSee CPLD Firmware
A2B0_PM9N53J9-2615CPLD firmware dependentSee CPLD Firmware
A2B0_NM8N43J9-2817CPLD firmware dependentSee CPLD Firmware
A3B1_PN8J73J9-3221CPLD firmware dependentSee CPLD Firmware
A3B1_NN7K73J9-3423CPLD firmware dependentSee CPLD Firmware
A4B2_PM7L113J9-3827CPLD firmware dependentSee CPLD Firmware
A4B2_NN6M113J9-4029CPLD firmware dependentSee CPLD Firmware
A5B3_PK5L103J9-4433CPLD firmware dependentSee CPLD Firmware
A5B3_NJ5M103J9-4635CPLD firmware dependentSee CPLD Firmware
B0B4_PN5J63J9-15398CPLD firmware dependentSee CPLD Firmware
B0B4_NN4K63J9-1741CPLD firmware dependentSee CPLD Firmware
B1B5_PJ7L53J9-2145CPLD firmware dependentSee CPLD Firmware
B1B5_NK7L43J9-2347CPLD firmware dependentSee CPLD Firmware
B2_PHSIOL11N93J9-272CPLD firmware dependentSee CPLD Firmware
B2_NHSOM11N103J9-296CPLD firmware dependentSee CPLD Firmware
B3_PRESETL10M53J9-338CPLD firmware dependentSee CPLD Firmware
B3_NHSIM10N123J9-3510CPLD firmware dependentSee CPLD Firmware
B4_P

TDI

J6F531BJ9-39851, J10-9JTAG / user IO CPLD firmware dependentSee CPLD Firmware
B4_NTDOK6F631BJ9-53, J10-413JTAG / user IO CPLD firmware dependentSee CPLD Firmware
B5_PTMSL5G131BJ9-55, J10-455JTAG / user IO CPLD firmware dependentSee CPLD Firmware
B5_NJTAGENL4E531BJ9-4757JTAG enable CPLD firmware dependentSee CPLD Firmware
HSIOTCKN9G231BJ9-59, J10-21JTAG / user IO CPLD firmware dependentSee CPLD Firmware
HSOSMB_ALERTN10K232J9-63CPLD firmware dependentSee CPLD Firmware
RESETSMB_SDAM5H532J9-85CPLD firmware dependentSee CPLD Firmware
HSISMB_SCLN12H432J9-107CPLD firmware dependentSee CPLD Firmware
TDIREFCLKF5M21B2J9-51, J10-911JTAG / user IO CPLD firmware dependentSee CPLD FirmwareTDO
BUTTON1C101BJ9-53, J10-38S2CPLD firmware dependentactiv low, See CPLD Firmware 
BUTTON2B101BJ9-55, J10-58S1CPLD firmware dependentactiv low, See CPLD Firmware 
ENC_AA101B8U13-JTAG enable CPLD firmware dependentSee CPLD Firmware
TCKG21BJ9-59, J10-1JTAG / user IO CPLD firmware dependentSee CPLD Firmware
SMB_ALERTK22J9-3CPLD firmware dependentSee CPLD Firmware
13Sensor input channel A-
ENC_BA98U13-12Sensor input channel B-
ENC_IA118U13-14Sensor input channel I-
LED0D68D2SMB_SDAH52CPLD firmware dependentSee CPLD Firmware
LED1B228D1CPLD firmware dependentSee CPLD Firmware
REFCLKM22J9-11CPLD firmware dependentSee CPLD Firmware
BUTTON1C108S2CPLD firmware dependentactiv low, See CPLD Firmware 
BUTTON2B108S1CPLD firmware dependentactiv low, See CPLD Firmware 
ENC_AA108U13-13Sensor input channel A-
ENC_BA98U13-12Sensor input channel B-
ENC_IA118U13-14Sensor input channel I-
LED0D68D2CPLD firmware dependentSee CPLD Firmware
LED1B28D1CPLD firmware dependentSee CPLD Firmware
M_BEMF_B_DB58U15-13Back EMF signal phase B-
M_BEMF_C_DA58U15-12Back EMF signal phase C-
M_BEMF_A_DA48

U15-14

Back EMF signal phase A-
M_BEMF_B_DB58U15-13Back EMF signal phase B-
M_BEMF_C_DA58U15-12Back EMF signal phase C-
M_BEMF_A_DA48

U15-14

Back EMF signal phase A-
M_PWM_AHF11AU8-2Phase A half bridge high (DC_LINK) side driver signal-
M_PWM_ALE31AU8-3Phase A half bridge low (PGND) side driver signal-
M_PWM_BHE11AU9-2Phase B half bridge high (DC_LINK)side driver signal-
M_PWM_BLD11AU9-3Phase B half bridge low (PGND) side driver signal-
M_PWM_CHE41AU10-2Phase C M_PWM_AHF11AU8-2Phase A half bridge high (DC_LINK)side driver signal-
M_PWM_ALCLE3C11AU8U10-3Phase A C half bridge low (PGND) side driver signal-
M_PWM_BHDHE1C21AU9U11-2Phase B D half bridge high (DC_LINK) side driver signal-
M_PWM_BLDLD1B11AU9U11-3Phase B D half bridge low (PGND) side driver signal-
MSD_PWM_CHIAE4E61AU10-2Phase C half bridge high (DC_LINK)side driver signal-
M_PWM_CLC11AU10-3Phase C half bridge low (PGND) side driver signal-
M_PWM_DHC21AU11-2Phase D half bridge high (DC_LINK) side driver signal-
M_PWM_DLB11AU11-3Phase D half bridge low (PGND) side driver signal-
8U3-SD_IAE68U3-6Current measurement phase A33 Ohm series Resistor
SCLK_AB38U3-7, U5-7Clock for ADC for current measurement phase A and B(5-20 MHz)
SD_VB48U7-6Voltage measurement DC_LINK33 Ohm series Resistor
SD_IBA28U5-6Current measurement phase B33 Ohm series Resistor
SCLK_V_AA38U7-7Clock for ADC for voltage measurement DC_LINK(5-20 MHz)
M_DISABLE_D_DJ12U11-5Halfe bridge disable phase Ddisabled when high, pull up connected
M_DISABLE_A_DM12U8-5Halfe bridge disable phase Adisabled when high, pull up connected 
M_DISABLE_B_DL22U9-5Halfe bridge disable phase Bdisabled when high, pull up connected 
M_DISABLE_C_DK12U10-5Halfe bridge disable phase Cdisabled when high, pull up connected 
REFCLKM22J9-11CPLD firmware dependent-
RSTM32J10-6CPLD firmware dependent-
UART_RXN22J10-7CPLD firmware dependent-
UART_TXN32J10-8CPLD firmware dependent-
CLK_25MHZH62U26-3Clock input for accurate 25 Mhz clk.-


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DesignatorColorConnected toSignal nameActive LevelNote
D1greenU25-B2LED1highUser LED, CPLD Firmware dependent, see Firmware description.
D2greenU25-D6LED0highUser LED, CPLD Firmware dependent, see Firmware description.
D3greenU1-A3, U2-B1PGOODhighON when +15.0V_M and +5.0V_M regulator indicated power good. Connected via transistor T1.
D4greenDC_LINK-lowON when DC_LINK above 11.7V. Connected via comparator U14D to DC_LINK


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DesignatorConnected toSignal nameActive LevelNote
S1U25-B10BUTTON2lowUser button, CPLD Firmware dependent, see Firmware description.
S2U25-C10BUTTON1lowUser button, CPLD Firmware dependent, see Firmware description.


ADCs

There are three isolating AD7403-8 ADCs for continous measurement oft phase A current (U3), phase B current (U5) and the DC_LINK voltage (U7) on board. The currents are measured through the shunt resistors R22, R28 for phase A and B respectively. The ADC clock is routed to the CPLD. For Currents the clock has the signal lable SCLK_A and for the voltage SCLK_V_A. The data signals are also routed to the CPLD. See CPLD Firmware for further description.

BEMF

Back EMF zero crossing signals for sensorless sensor-less motor control are implemented for Phase A, B and C. They are routed via a triple channel Digital isolator (U15) to the CPLD. See CPLD Firmware for further description.

Half bridge drivers

Four ADuM7223 isolated half bridge drivers (U8, U9, U10, U11) are used for driving the four phases.

DCDCs

There On the Motor side are two DCDCs on board. LTM8053 (U1) is utilized for the generation of 15V  U1

DCDC for 5V, U2

the 15V transistor control voltage from VIN and can be measured on Testpoint TP1. A LTM8074 DCDC (U2) generates 5V from VIN for miscellaneous signals on the motor side of the PCB and can be measured on TP2.

Two isolated DCDCs ADUM5028 (U4, U6) two? further isolated are used for the generation of two seperate clean for ADC U4, U65V for the supply of the current measurement ADCs U3 and U5.

Power and Power-On Sequence

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In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit


Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


EEPROM

The 2K Microchip 24AA02E48 EEPROM with pre-programmed unique 48bit address is connected to the CRUVI HS (Signals: SMB_SDA, SMB_SCL) connector and can e.g. be used for identifiction purposes.

Power Supply

The motor driving stage is supplied via connector J7 with maximum of 40V DC. Polarity of the powersupply is noted on the PCB.  

Warning

Check powersupply for correct polarity. Inversion of polarity will damage the module. At least Transistor T11 may be harmedbe harmed. Furthermore make sure that under any circumstances the absolute maximum voltage does not exceed 42V.

Power Consumption

The power consumption on the motor stage side (J7) is dominated by the connected motor and the corresponding driving algorithm. The idle consumption is given below.

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titlePower Consumption

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Power Input PinTypical CurrentNote
VIN~ 47mA@24V (J7), no motor connected, no pwm signal driven.

Power Distribution Dependencies

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anchorFigure_PWR_PD
titlePower Distribution
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PWM signal driven.


Power Distribution Dependencies

Power-On Sequence

There is no power sequence

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Scroll Title
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titleVoltage Monitor CircuitPower Distribution


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Power-On Sequence

There is no power on sequence which has to be maintained.

Power Rails

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titleModule power rails.

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Power Rail Name

B2B Connectors


DirectionNotes

+3.3V_D

J11-8, J9 J9-4, J9-9In-
+5.0V_DJ11-12, J9-60In-
VADJJ9-36In-
VINJ7Inisolated to the others


Board to Board Connectors

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  • This section is optional and only for modules.

  • use "include page" macro and link to the general B2B connector page of the module series,

    For example: 6 x 6 SoM LSHM B2B Connectors

    Include Page
    PD:6 x 6 SoM LSHM B2B ConnectorsPD:
    6 x 6 SoM LSHM B2B Connectors

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titlePS absolute maximum ratings

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VIN
SymbolsDescriptionMinMaxUnit
VINMotor supply voltage042V

+3.3V_D

digital part 3.3V supply voltage-0.33.9V
+5.0V_DDdigital part 5V supply voltage-0.36.0V
VADJVIO Bank Voltage-0.33.9V


Recommended Operating Conditions

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titleRecommended operating conditions.

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ParameterMinMaxUnitsReference Document
VIN2240V
See ???? datasheets.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.°CSee Xilinx ???? datasheet.
LTM8053 datasheet

+3.3V_D

3.1353.465VMAX10 datasheet
+5.0V_D4.755.25VSN65LBC173AD datasheet

VADJ (3.3V operation)

VADJ (2.5V operation)

VADJ (1.8V operation)

3.135

2.375

1.71

3.465

2.625

1.89

VMAX10 datasheet
T-40105°CAD7403-8 (junction)
T (ambient)-4085°CSN65LBC173AD datasheet
°CSee Xilinx ???? datasheet.


Physical Dimensions

  • Module size: 68.35 mm × 131 mm.  Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: 5 mm.

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titlePhysical Dimension


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Currently Offered Variants 

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titleTrenz Electronic Shop Overview

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Trenz shop TE0728 CR00140 overview page
English pageGerman page


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titleHardware Revision History

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DateRevisionChangesDocumentation Link
2019-12-2001Prototypes-
2020-03-1002

removed LS connector J11,

added EEPROM U16

-


Hardware revision number can be found on the PCB board together with the module model number separated by the dash.by the dash.

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titleBoard hardware revision number.


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Document Change History

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    • Metadata is only used of compatibility of older exports

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DateRevisionContributorDescription

Page info
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  • change listinitial version

--

all

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  • --


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