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Notes :

Zynq PS Design with Linux Example and Camera Demoinstalled python3 and Jupyter Notebook.

Refer to http://trenz.org/te0726-info for the current online version of this manual and other available documentation.

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Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashOthersNotes
te0726-01 01 REV0164MB LPDDR216MB
not included, user modifications are needed
te0726-03r r REV02, REV03128MB DDR3L16MB
not included, user modifications are needed
te0726-03m m REV02, REV03512MB DDR3L16MB

te0726-03-07s-1c7sREV03512MB DDR3L16MBnot included


Design supports following carriers:

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For general structure and of the reference design, see Project Delivery - Xilinx AMD devices

Design Sources

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TypeLocationNotes
Vivado<design name>/block_design
<design name>/constraints
<design name>/ip_lib
Vivado Project will be generated by TE Scripts
Vitis<design name>/sw_libAdditional Software Template for Vitis and apps_list.csv with settings automatically for Vitis app generation
PetaLinux<design name>/os/petalinuxPetaLinux template with current configuration


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Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.

See also:

The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.

TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also be executed by Xilinx Vivado/SDK GUI.  For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality


  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
    Image Modified
  2. Press 0 and enter to start "Module Selection Guide"
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
    1. (optional for manual changes) Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see TE Board Part Files
  5. Create XSA and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Create Linux (uboot.elf and image.ub) with exported XSA
    1. XSA is exported to "prebuilt\hardware\<short name>"
      Note: HW Export from Vivado GUI create another path as default workspace.
    2. Create Linux images on VM, see PetaLinux KICKstart
      1. Use TE Template from /os/petalinux_<ramdisk or ubuntu>
    3. (optional) Build the Ubuntu image file with executing the "mkubuntu_jupyter.sh" file in Linux Terminal
      1. ramdisk
  7. Add Linux files (uboot.elf and image.ub) to prebuilt folder
    1. "prebuilt\os\petalinux\<DDR size>" or "prebuilt\os\petalinux\<short name>"
      Notes: Scripts select "prebuilt\os\petalinux\<DDR size>", if exist, otherwise "prebuilt\os\petalinux\<short name>"
  8. Generate Programming Files with Vitis
    1. Run on Vivado TCL: TE::sw_run_vitis -all
      Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv"
    2. (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_vitis
      Note:  TCL scripts generate also platform project, this must be done manuelly in case GUI is used. See Vitis

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Xilinx documentation for programming and debugging: Vivado/SDK/SDSoC-Xilinx Software Programming and Debugging

Get prebuilt boot binaries

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  1. Connect JTAG and power on the carrier with module
  2. Open Vivado Project with "vivado_open_existing_project_guimode.cmd" or if not created, create with "vivado_create_project_guimode.cmd"
  3. Type on Vivado TCL Console: TE::pr_program_flash _binfile -swapp u-boot
    Note: To program with Vitis GUI, use special FSBL (zynqmp_fsbl_flash) on setup
             optional "TE::pr_program_flash _binfile -swapp hello_te0726" possibleFormat the SD Card with SD Card Formatter or other tool
  4. (optional) Write the Debian image or Ubuntu image file on SD Card with Win32DiskImager
  5. Copy Petalinux image.ub on SD-Card
    • use files from (<project foler>/_binaries_<Articel Name>)/boot_linux from generated binary folder,see: Get prebuilt boot binaries
    • For correct prebuilt file location, see <design_name>/prebuilt/readme_file_location.txt
    • Important: Do not copy Boot.bin on SD(is not used see SD note), only other files.
  6. Insert SD-Card

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  1. Prepare HW like described in section 100404879 100405692
  2. Connect UART USB (most cases same as JTAG)
  3. Insert SD Card with image.ub
  4. Power On PCB
    Note: 1. Zynq Boot ROM loads FSBL from QSPI into OCM, 2. FSBL loads U-boot from QSPI into DDR, 3. U-boot load Linux from SD into DDR

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  1. Open Serial Console (e.g. putty)
    1. Speed: 115200
    2. COM Port: Win OS, see device manager, Linux OS see  dmesg |grep tty  (UART is *USB1)
  2. Linux Console:
    Note: Wait until Linux boot finished For Linux Login use:
    1. User Name: root
    2. Password: root
      Note: Wait until Linux boot finished For Linux Login use:
      1. User Name: root
      2. Password: root
  3. You can use a Linux shell now.I2C 1 Bus type: i2cdetect -y -r 5
    Bus 0...5 possible
    1. ETH0 works with udhcpc
    2. USB: insert USB device
  4. When using ubuntu as root file system, GUI starts automatically.
  5. (optional) Ubuntu Desktop
    1. Web Browser Mozilla firefox can be used.
    2. Audio or Vider file can also be performed directly in GUI.
  6. To know the board ip address, you can enter the following command:
      To know the board ip address, you can enter the following command:
      1. ifconfig
      2. You can find the ip address in : 
        1. inet addr: <Board Ip Address>
    1. Use the following command to connect the board to Jupyter Server:
      1. jupyter notebook --ip=<Board Ip Address> --port=<An optional Number 0-9999>  --NotebookApp.token='' --allow-root &

    2. In Web Browser, open a page with the following address:
      1. <Board IP Address>:<Port Number> --→ For example 192.168.2.1:8888
    3. Written code in Python can now be executed.
      1. Number 0-9999>  --NotebookApp.token='' --allow-root &

      2. For example : jupyter notebook --ip=192.168.2.1 --port=8888  --NotebookApp.token='' --allow-root &
    4. In Web Browser, open a page with the following address:
      1. <Board IP Address>:<Port Number> --→ For example 192.168.2.1:8888
    5. Written code in Python can now be executed.

    Example code:


    Code Block
    languagepy
    import matplotlib.pyplot as plt
    import numpy as np
    
    mu, sigma = 100, 15
    x = mu + sigma * np.random.randn(10000)
    
    # the histogram of the data
    n, bins, patches = plt.hist(x, 50, density=1, facecolor='g', alpha=0.75)
    
    
    plt.xlabel('Smarts')
    plt.ylabel('Probability')
    plt.title('Histogram of IQ')
    plt.text(60, .025, r'$\mu=100,\ \sigma=15$')
    plt.axis([40, 160, 0, 0.03])
    plt.grid(True)
    plt.show()

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    System Design - Vivado

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    Note:

    • Description of Block Design, Constraints... BD Pictures from Export...

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    DateDocument Revision

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    • typo

    2020-05-28

    v.3Mohsen Chamanbaz
    • initial release
    --all

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