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- Operating system: Microsoft Windows 2000, Microsoft Windows XP, Microsoft Vista, Microsoft Windows 7 or above;
- Xilinx ISE 10.1 or later for indirect SPI in-system programming (ISP) (for Spartan-3E aka TE0300, see Xilinx Answer AR #25377);
- Xilinx EDK for some reference designs;
- Interface: USB host;
- JTAG cable with flying leads.
- SPI cable with flying leads (for TE0300) for direct SPI in-system programming (ISP).
| Note |
|---|
| Direct SPI configuration is supported only up to Xilinx iMPACT version 11.x. See Xilinx AR#36156. Available only for TE0300. |
The JTAG interface allows a fast (10 seconds), frequent but volatile configuration (only the FPGA is programmed using Xilinx ISE or EDK and a .bit bitstream and not the SPI Flash) of the TE USB FX2 module. However, only through the JTAG interface it is possible to develop and debug with Xilinx tools (e.g. Xilinx ChipScope, Xilinx Microprocessor Debugger. The JTAG interface allows also a medium-fast (1-2 minutes), occasional, non-volatile on-site operations such as SPI Flash bitstream download: indirect SPI in-system programming (ISP).
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