Title: TE USB FX2 Module Configuration  
Author: Sergio Pavesi 20 08, 2013
Last Changed by: Sergio Pavesi 14 11, 2013
Tiny Link: (useful for email) https://wiki.trenz-electronic.de/x/uASi
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Incoming Links
TE USB Suite (1)
    Page: Logic Architecture Layer (Generation 2 = Generation 3): FPGA image
Hierarchy
Parent Page
    Home page: TE USB FX2 Suite
Children (8)
    Page: TE USB FX2 module IIC Bus: it is used for firmware and MB Commands
    Page: TE USB FX2 module SPI bus
    Page: Recomended Design Tools Settings
    Page: Switches: settings for USB Firmware, FPGA bitstream programming, Power Supply and reset.
    Page: Firmware and Bitstreams
    Page: Configuration of USB (firmware, EEPROM) and FPGA (bitstream, SPI Flash)
    Page: FPGA configuration process successfully completes (DONE PIN)
    Page: Reset the TE USB FX2 module: "power-on reset" or "powered reset"
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Recent Changes
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14 11, 2013 10:50 Sergio Pavesi View Changes
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13 11, 2013 15:01 Sergio Pavesi View Changes
13 11, 2013 14:55 Sergio Pavesi  
Outgoing Links
External Links (14)
    www.xilinx.com/support/answers/25377.htm
    www.xilinx.com/support/answers/36156.htm
    https://wiki.trenz-electronic.de/display/TEUSB/FLASH_WRITE+…
    https://wiki.trenz-electronic.de/display/TEUSB/READ_STATUS+…
    https://wiki.trenz-electronic.de/display/TEUSB/POWER+comman…
    https://wiki.trenz-electronic.de/display/TEUSB/Firmware+and…
    https://wiki.trenz-electronic.de/display/TEUSB/FLASH_READ+c…
    https://wiki.trenz-electronic.de/pages/viewpage.action?page…
    https://wiki.trenz-electronic.de/pages/viewpage.action?page…
    https://wiki.trenz-electronic.de/display/TEUSB/FLASH_ERASE+…
    https://wiki.trenz-electronic.de/pages/viewpage.action?page…
    https://wiki.trenz-electronic.de/pages/viewpage.action?page…
    https://wiki.trenz-electronic.de/pages/viewpage.action?page…
    https://wiki.trenz-electronic.de/display/TEUSB/OpenFutNet
TE0300 Spartan-3E Module (2)     Page: TE0300 SPI Interface
    Page: TE0300 DIP Slide Switch S1 (Configuration)
TE USB Suite (4)     Page: Logic Architecture Layer (Generation 2 = Generation 3): FPGA image
    Page: Indirect SPI Programming using iMPACT (bitstream only)
    Page: FPGA Configuration (SPI Flash and FPGA)
    Page: Configuration of USB (firmware, EEPROM) and FPGA (bitstream, SPI Flash)
TE0320 Spartan-3A DSP Module (1)     Page: TE0320 SPI Interface