Page History
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| Stage | Control | Voltage Domains | Signal Monitoring to change stage | ||||
|---|---|---|---|---|---|---|---|
| IDLE | --- | ------ | RESETN | ||||
| STAGE0STAGE1 | EN_PS_PL enabled (High) | 0.853V, 0.85V, 0.9V | --- | PG_PS_PL | |||
| STAGE2STAGE1 | EN_GR1 enabled (High) | 1.8V, 0.85V, 1.2V | PG_PS_PLGR1 | ||||
| STAGE2STAGE3 | EN_GR2 enabled (High) | 3.3V, 1.8V | PG_GR1GR2 | ||||
| STAGE3STAGE4 | EN_VCCRF enabled (High) | 0.8534V, 1.158V, 3.3V | PG_GR2VCCRF | ||||
| STAGE4STAGE5 | EN_RF_ADC enabled (High) EN_RF_DAC enabled (High) | 0.925V, 1.8V 0.925V, 1.8V, 2.5V | PG_ VCCRF | STAGE5 | --- | --- | PG_RF_ADC PG_RF_DAC |
| WAIT_RDY | --- | --- | --- | ||||
| RDY | por enabled (High) en1 enabled (High) if DONE is High. | --- | pg_all |
- pg_all <= PG_PS_PL & PG_GR1 & PG_GR2 & PG_VCCRF & PG_RF_ADC & PG_RF_DAC
- If por is high then POR_B (power-on reset signal) will be deactivated.
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