...
| Scroll Title |
|---|
| anchor | Table_SIP_MJTG |
|---|
| title | JTAG pins connection |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
JTAG Signal | Connected to |
|---|
| M_TMS | FTDI (U8) - ADBUS3 | | M_TDI | FTDI (U8) - ADBUS1 | | M_TDO | FTDI (U8) - ADBUS2 | | M_TCK | FTDI (U8) - ADBUS0 |
|
Micro USB2.0
SD Card Reader
The TEB0707 is equipped with an Micro SD Card reader, J8. Data for USBs are expander through an IO Expander (U4)There is a USB2.0 Socket, J15 provided in order to communicate with the FTDI, U8. Data signals from USB2.0 are passed through a Line Filter L4 and a Diode U9 in order to be protected against inverse polarity connection.
| Scroll Title |
|---|
| anchor | Table_SIP_USB2SD Card |
|---|
| title | USB2.0 Socket information |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Pin | Schematic | Connected to | Notes | ID | N.C | N.C |
|---|
| D+ | USB_P | FTDI, U8 | Through Line Filter, L4 | | D- | USB_N | FTDI, U8 | Through Line Filter, L4 | Vbus | VBUS | Diode, U9 |
|
Micro USB A
| DAT0...3 | ESD_DAT0...3 | B2B, JB1 | Through IO Expander, U4 | | CMD | ESD_CMD | B2B, JB1 | Through IO Expander, U4 | | VDD | 3.3V_SD | B2B, JB1 | Through IO Expander, U4 | | CLK | ESD_CLK | B2B, JB1 | Through IO Expander, U4 | | DLT | SD_CD | FPGA Bank 3, U6 |
|
|
Micro USB2.0 Socket
There is a USB2.0 Socket, J15 provided in order to communicate with the FTDI, U8. Data signals from USB2.0 are passed through a Line Filter L4 and a Diode U9 in order to be protected against inverse polarity connection.
| Scroll Title |
|---|
|
| Scroll Title |
|---|
| anchor | Table_SIP_USBA |
|---|
| title | USB2.0 Socket information |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Pin | Schematic | Connected to | Notes |
|---|
| VCCVbus | USB_VBUS | B2B, JB3 |
| | DataD+ | O2-D_P | B2B, JB3 | Through Line Filter, L1L4 | | DataD- | O2-D_N | B2B, JB3 | Through Line Filter, L1L4 |
|
RJ45 LAN Socket
There is a RJ45 Ethernet LAN Socket, J2 connected to B2B, JB1 via 4x channels data receive and transmit.
USB A Socket
| Scroll Title |
|---|
| anchor | Table_SIP_ETHUSBA |
|---|
| title | RJ45 LAN USB2.0 Socket information |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Pin | Schematic | Connected to | Notes |
|---|
2PHYMDI0_P JB13 | PHY_MDI0_N | B2B, JB1 | 4 | PHY_MDI1_P | B2B, JB1 | 5 | PHY_MDI1_N | B2B, JB1 | 6 | PHY_MDI2_P | B2B, JB1 | 7 | PHY_MDI2_N | B2B, JB1 | 8 | PHY_MDI3_P | B2B, JB1 | 9 | PHY_MDI3_N | B2B, JB1 | VCC | ETH-VCC | B2B, JB1 | | Green LED | ETH1_LED0 | Intel MAX 10, U6 | Link/Activity indicator | | Yellow LED | ETH1_LED1 | Intel MAX 10, U6 | Speed indicator | |
Test Points
...
you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section.
Example:
| | Data+ | O2-D_P | B2B, JB3 | Through Line Filter, L1 | | Data- | O2-D_N | B2B, JB3 | Through Line Filter, L1 |
|
RJ45 LAN Socket
There is a RJ45 Ethernet LAN Socket, J2 connected to B2B, JB1 via 4x channels data receive and transmit.
| Scroll Title |
|---|
| anchor | Table_SIP_ETH |
|---|
| title | RJ45 LAN Socket information |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Pin | Schematic | Connected to | Notes |
|---|
| 2 | PHY_MDI0_P | B2B, JB1 |
| | 3 | PHY_MDI0_N | B2B, JB1 |
| | 4 | PHY_MDI1_P | B2B, JB1 |
| | 5 | PHY_MDI1_N | B2B, JB1 |
| | 6 | PHY_MDI2_P | B2B, JB1 |
| | 7 | PHY_MDI2_N | B2B, JB1 |
| | 8 | PHY_MDI3_P | B2B, JB1 |
| | 9 | PHY_MDI3_N | B2B, JB1 |
| | VCC | ETH-VCC | B2B, JB1 |
| | Green LED | ETH1_LED0 | Intel MAX 10, U6 | Link/Activity indicator | | Yellow LED | ETH1_LED1 | Intel MAX 10, U6 | Speed indicator |
|
Test Points
| Page properties |
|---|
|
you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section. Example: | Test Point | Signal | B2B | Notes |
|---|
| 10 | PWR_PL_OK | J2-120 |
|
...
| anchor | Table_SIP_TPs |
|---|
| title | Test Points Information |
|---|
...
On-board Peripherals
| Page properties |
|---|
|
Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
|
| Page properties |
|---|
|
Notes : In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection |
...
| anchor | Table_OBP |
|---|
| title | On board peripherals |
|---|
...
Quad SPI Flash Memory
| Page properties |
|---|
|
Notes : Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options.
|
| Scroll Title |
|---|
| anchor | Table_OBPSIP_SPITPs |
|---|
| title | Quad SPI interface MIOs and pinsTest Points Information |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
|
...
| anchor | Table_OBP_EEP |
|---|
| title | I2C EEPROM interface MIOs and pins |
|---|
| TP1 | 3.3V | Regulator, U1 |
| | TP2 | VIN | Voltage Protection, U2 |
| | TP4 | IOV | Regulator, U3 |
| | TP5 | 3.3V | Power Switch, Q1 |
| | TP6 | C5VIN | Power Switch, Q2 |
|
|
On-board Peripherals
| Page properties |
|---|
|
Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
|
| Page properties |
|---|
|
Notes : In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection |
...
| anchor | Table_OBP_I2C_EEPROM |
|---|
| title | I2C address for EEPROM |
|---|
...
LEDs
| Scroll Title |
|---|
| anchor | Table_OBP_LED |
|---|
| title | On - board LEDsperipherals |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Color | Connected to | Active Level | Note | |
EEPROM
| Notes |
|---|
| Intel MAX 10 | U6 |
| | FTDI | U8 |
| | SDIO Expander | U4 |
| | EEPROM | U10 |
| | Oscillator | U7 |
| | LEDs | D1...8 |
|
|
LEDs
| Scroll Title |
|---|
| anchor | Table_OBP_EEPLED |
|---|
| title | I2C EEPROM interface MIOs and pinsOn-board LEDs |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
|
| Pin | Schematic | Connected to | Notes |
|---|
CS | EECS | FTDI, U8 | CLK | EECLK | FTDI, U8 | DIN | EEDATA | FTDI, U8 | | Scroll Title |
|---|
| anchor | Table_OBP_I2C_EEPROM |
|---|
| title | I2C address for EEPROM |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
style | widths | | sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
| I2C Address | Designator | Notes |
|---|
A0 | U15 |
...
| Designator | Color | Schematic | Connected to | Active Level | Note |
|---|
| D2 | Green | LED3 | FPGA Bank 3 | Active High |
| | D3 | Green | LED5 | FPGA Bank 3 | Active High |
| | D4 | Green | LED7 | FPGA Bank 3 | Active High |
| | D5 | Green | LED4 | FPGA Bank 8 | Active High |
| | D6 | Green | LED6 | FPGA Bank 2 | Active High |
| | D7 | Green | LED8 | FPGA Bank 8 | Active High |
| | D8 | Green | LED2 | FPGA Bank 8 | Active High |
| | D9 | Green | LED1 | FPGA Bank 8 | Active High |
|
|
EEPROM
| Scroll Title |
|---|
| anchor | Table_OBP_ETHEEP |
|---|
| title | Ethernet PHY to Zynq SoC connectionsI2C EEPROM interface MIOs and pins |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| U?? Pin | Signal NameSignal Description | Note | |
...
| Notes |
|---|
| CS | EECS | FTDI, U8 |
| | CLK | EECLK | FTDI, U8 |
| | DIN | EEDATA | FTDI, U8 |
|
|
| Scroll Title |
|---|
| anchor | Table_OBP_CLKI2C_EEPROM |
|---|
| title | OsillatorsI2C address for EEPROM |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
|
| Designator | Description | Frequency | Note |
|---|
MHz | MHz | KHz |
Programmable Clock Generator
...
| I2C Address | Designator | Notes |
|---|
| A0 | U10 |
|
|
Clock Sources
| Scroll Title |
|---|
| anchor | Table_OBP_PCLKCLK |
|---|
| title | Programmable Clock Generator Inputs and OutputsOsillators |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Designator | Description | Frequency | Note |
|---|
| U7 | MEMS Oschilator | 12 MHz |
U?? Pin
| Signal | Connected to | Direction | Note |
|---|
IN0 | IN1 | IN2 | IN3 | XAXB | SCLK | SDA | OUT0 | OUT1 | OUT2 | OUT3 | OUT4 | OUT5 | OUT6 | OUT7 | OUT8/OUT9
|
Power and Power-On Sequence
...