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The Trenz Electronic TEM0005-02 is a low-cost , small FPGA module with Microsemi SmartFusion2 FPGA SoC and 32 MByte flash memory for configuration and operation. SmartFusion2 combines a 166 MHz Cortex-M3 MCU with 256 KByte Flash and 80 KByte SRAM as well as 12 kLUT FPGA Core Logic.
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- SoC/FPGA
- Package: VFG400
- Device: M2S005, M2S010, M2S025, M2S050 ,M2S060 *
- Engine: VFG166Mhz 32Bit ARM Cortex-M3
- Speed: -1, Standard*, **
- Temperature: C, I,*, **
- RAM/Storage
- Low Power DDR3
- Data width: 8/ 16bit
- Size: def. 2Gb*
- Speed: 20ns***
QSPIData width: 8 bit - SPI Flash
- 2Kb EEPROM
- On Board
- Crypto Authentication IC
- Voltage monitor IC
- 10/100 Mbps PHY Ethernet
- Interface
- Power
- 5V 3.3V supplied from carrier
- Dimension
- Notes
- * depends on assembly version** also non low power assembly options possible
- *** depends on used FPGA and DDR3 combination
Block Diagram
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Scroll Title |
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anchor | Figure_OV_BD |
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title | TEM0005 block diagram |
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![](/download/attachments/107056165/TEM0005_OV_BD.png?version=12&modificationDate=1604059075512&api=v2)
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Main Components
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anchor | Figure_OV_MC |
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title | TEM0005 main components |
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![](/download/attachments/107056165/TEM0005_OV_MC.png?version=20&modificationDate=1599488309686&api=v2)
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- Microsemi SmartFusionSmartFusion2 SoC, U2
- Configurable Dual DCDC Regulator, U7
- EEPROM, U4
- 10/100 Mb Ethernet, U1
- QSPI Flash, U3
- Authentication IC, U6
- DDR3 Memory, U5
- B2B Connector, J1
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Scroll Title |
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anchor | Table_OV_IDS |
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title | Initial delivery state of programmable devices on the module |
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Storage device name | Content | Notes |
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Quad SPI Flash | Not Programmed |
| EEPROM | Not Programmed |
| DDR3 SDRAMCryptoAuthentication | Not Programmed |
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Configuration Signals
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anchor | Table_SIP_B2B |
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title | General PL I/O to B2B connectors information |
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FPGA Bank | Interface | I/O Signal Count | Voltage Level | Notes |
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Bank 01 | GPIO | 8x Single Ended | 3.3V |
| UART | 4x Single Ended | 3.3V |
| I2C | 2x Single Ended | 3.3V |
| GOLDEN | 1x Single Ended | 3.3V |
| Bank 2 | ULPI/I/O | 12x Single Ended | 3.3V |
| I2C | 2x Single Ended | 3.3V |
| GPIO | 10x Single Ended | 3.3V |
| SC SPI | 4x Single Ended | 3.3V | SPI0 | 4x Single Ended |
| 3.3V | SPI1 | 7x Single Ended | 3.3V |
| Bank 3 | JTAG | 5x Single Ended | 3.3V |
| Reset | 1x Single Ended | 3.3V |
| Bank 4 | I/O | 24x Single Ended/12 LVDS pairs | 3.3V |
| Bank 6 | I/O | 24x 28x Single Ended3.3V/14 LVDS pairs | VDDI6 | max 2.5V | Bank 7 | I/O | 4x Single Ended | 3.3V |
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title | On board peripherals |
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(Quad) SPI Flash Memory
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Notes : Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options. |
The TEM0005 is equipped with a QSPI (Q)SPI flash memory, U3 provided in order to store data and configuration.
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The TEM0005 is equipped with an EEPROM IC, U4. The two I2C signals are connected to authentication IC as well.
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There is an Authentication IC ATECC608A provided on TEM0005, The IC is connected to I2C0 signalsbus.
Scroll Title |
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anchor | Table_OBP_Auth |
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title | Authentication IC information |
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Pin | Schematic | Notes |
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SCL | I2C0_SCL | Serial Clock | SDA | I2C1_SCLSerial Data_SCL | Serial Data |
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anchor | Table_OBP_I2C_Authentication IC |
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title | I2C address for Authentication IC |
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Pin | I2C Address | Designator | Notes |
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SCL/SDA | 0xC0 | U6 | This is the default value, which can be changed, see device datasheet. |
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DDR3L SDRAM
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Notes : Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3) |
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- Part number: IS43TR16128CL-125KBLI
- Supply voltage: 1.5 VAccess: time 20 ns
- Temperature: -40 to 95 °C
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title | Osillators |
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Designator | Description | Frequency | Note |
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Y3 | Crystal Oscillator | 25 MHz | Connected to ETH PHY |
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Power and Power-On Sequence
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Scroll Title |
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anchor | Figure_PWR_VMC |
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title | Voltage Monitor Circuit |
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diagramWidth | 641642 |
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revision | 34 |
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Scroll Only |
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![](/download/attachments/107056165/TEM0005_PWR_VMC.png?version=4&modificationDate=1604062750923&api=v2)
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Power Rails
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anchor | Table_PWR_PR |
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title | Module power rails. |
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orientation | portrait |
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sortDirection | ASC |
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Power Rail Name | B2B Connector J1 Pin | Direction | Notes |
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3.3V | 1, 2, 3, 4 | Input |
| VDDI6 | 22 | Input |
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anchor | Table_PWR_BV |
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title | Zynq SoC bank voltages. |
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| Schematic Name | | Notes |
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Bank0 | VDDI01.5V | 1.5V |
| Bank1 | VDDI13.3V | 3.3V |
| Bank2VDDI2 | 3.3V | 3.3V |
| Bank3VDDI3 | 3.3V | 3.3V |
| Bank4VDDI4 | 3.3V | 3.3V |
| Bank5VDDI6 | 3.3V | 3.3V |
| Bank6 | VDDI6 | 3.3Vmax. 2.5V | supplied by carrier | Bank7VDDI7 | 3.3V | 3.3V |
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Board to Board Connectors
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Scroll Title |
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anchor | Table_TS_AMR |
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title | PS absolute maximum ratings |
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Symbols | Description | Min | Max | Unit |
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VIN | Input Supply Voltage | 2-0.7535 | 3.7563 | V | STG_T | Storage Temperature | -45 | 125 | °C |
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Scroll Title |
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Date | Revision | Changes | Documentation Link |
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2019-10-01 | REV01 | | REV01 | 2020-05-20 | REV02 | - Support M2S050 ->added >added R29,R30, C24..C26,C31
- Added resistor R32
- Full upd LIB
| REV02 |
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Scroll Title |
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Date | Revision | Contributor | Description |
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Page info |
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