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Overview

This guide shows the main components of the TE0802 module and introduces the first steps to get the provided reference design up and running. 

This module TE00802 has a Xilinx Zynq Ultrascale+ and several hardware features onboard that allows you to create digital hardware and software designs. For communication and configuration the module board offers a JTAG/UART Interface.

Prerequisites

Documentation

• Official links to the shop:
  • TE0802-02-1AEV2-A-MPSoC-Development-Board-mit-Xilinx-Zynq-UltraScale-ZU1-und-1-GB-LPDDR4
    
  • TE0802-02-2AEV2-A-MPSoC-Development-Board-mit-Xilinx-Zynq-UltraScale-ZU2-und-LPDDR4
• Technical Reference Manual:
  
  • TE0802 Technical Reference Manual
• Resources & Reference Designs:
  • TE0802 Resources
  • TE0802 Reference Design

Hardware Features and Overview

2 Board Power-Up

Reference Design - Introduction

The provided reference design "TE0802 test board" we are introducing in this Getting started guide interacts with most of the peripheral on the module. It shows as an example how to connect the different parts of the module to simplify the development of your own application. You can use it for your own design but keep in mind the overall FPGA resources and power consumption before deployment. The most important steps to get it up and running from the scratch are explained on TE0802 Test Board. The Download is available here.

An overview of the components used in this reference design is illustrated in the following figure:

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Hardware Setup and Power up in QSPI-Boot mode

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Preparations

1. Download the source code and configuration files for "TE0802 test_board" reference design. Ensure that your download files match your Vivado version.

2. Check the settings from DIP-Switch S1 (JTAG):

   S1.1	S1.2	S1.3	S1.4
   OFF	OFF	OFF	OFF

3. Connect the MicroUSB cable from your module board with your PC
4. Connect the module board with the power supply (5V)
5. Power on module board

6. 
   

7. Run _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:

   Code Block
   language bash theme Midnight title _create_win_setup.cmd/_create_linux_setup.sh
   ------------------------Set design paths---------------------------- -- Run Design with: _create_win_setup -- Use Design Path: <absolute project path> -------------------------------------------------------------------- -------------------------TE Reference Design--------------------------- -------------------------------------------------------------------- -- (0) Module selection guide, project creation...prebuilt export... -- (1) Create minimum setup of CMD-Files and exit Batch -- (2) Create maximum setup of CMD-Files and exit Batch -- (3) (internal only) Dev -- (4) (internal only) Prod -- (c) Go to CMD-File Generation (Manual setup) -- (d) Go to Documentation (Web Documentation) -- (g) Install Board Files from Xilinx Board Store (beta) -- (a) Start design with unsupported Vivado Version (beta) -- (x) Exit Batch (nothing is done!) ---- Select (ex.:'0' for module selection guide):

   
   

8. Press '0' and enter to start "Module Selection Guide"
   1. Select your assembly version
   2. validate selection
   3. press '12' and enter to "create Vivado project" and "create and open delivery binary folder"
9. Depending on the preferred application, continue with chapter "Linux in QSPI-Boot mode" or "'Hello Trenz' in QSPI-Boot mode"

Linux in QSPI-Boot mode

1. Connect the MicroUSB cable from your module board with your PC
2. Connect peripherals to devices
   • VGA, display port → monitor
   • USB → keyboard
   • ...
3. Connect the module board with the power supply (5V)
4. Power on module board

5. Program 'u-bootProgram 'hello_te0802' application on QSPI flash

   Code Block
   language bash theme Midnight title run on Vivado TCL (Script programs BOOT.bin on QSPI flash)
   TE::pr_program_flash -swapp hello_te0802u-boot

   
   

6. Power off module board
7. Copy image.ub, init.sh and boot.scr on SD card (e.g. <project folder>\test_board\_binaries_TE0802-02-2AEV2-A\boot_linux)

8. Switch the DIP-Switch S1 to QSPI-Boot mode

   S1.1	S1.2	S1.3	S1.4
   ON	OFF	OFF	OFF

   
   

9. Insert the SD card into the module board

10. Power on Restart the module board

11. In case the QSPI Flash is loaded with the reference design, you can connect to the board with a program like PuTTY. Just open up a serial session with baudrate of 115200 and the right COM - port (visible in Device Manager).

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2.2 TE0802 Hardware Setup and Power up in SD-Boot mode (Linux)

1. Image AddedImage Added

   
   

2. Boot process

   1. Zynq Boot ROM loads FSBL from QSPI into OCM,

   2. FSBL init PS, programs PL using the bitstream and loads U-boot from QSPI into DDR,
   3. U-boot loads Linux (image.ub) from SD into DDR
3. For usage instructions please refer to chapter Linux application

'Hello Trenz' in QSPI-Boot mode

1. Connect the MicroUSB cable from your module board with your PC

2. Connect the module board with the power supply (5V)

3. Power on module board

4. Program 'hello_te0802' application on QSPI flash

   Code Block
   language bash theme Midnight title run on Vivado TCL (Script programs BOOT.bin on QSPI flash)
   TE::pr_program_flash -swapp hello_te0802

   
   

5. Switch the DIP-Switch S1 to QSPI-Boot mode:

   S1.1	S1.2	S1.3	S1.4
   ON	OFF	OFF	OFF

   
   

6. Restart the module board

Check the settings from DIP-Switch S1:


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The Voltage set with Jumper J1 determines the source of the input voltage for the voltages regulator chip U1 to the left of J1. Either 5V from the MicroUSB port (VUSB) or 5V from pin header J4.

With the shown setting of Jumper J2 the voltage VADJ is set to 3.3V that comes from the carriers voltage regulator chip U1. The 1.8V comes from the module. The Voltage VADJ is wired to the module and is used as the BANK34 supply voltage.

7. Use a MicroUSB cable to connect your board to the PC.cc

8. All the LEDs are simply routed to the FPGA, hence none of them should be turned on. If the qspi flash on the module is preloaded with a design though, it might be that some LEDs are blinking.

9. In case the QSPI Flash is loaded with the reference design, you can connect to the board with a program like PuTTY. Just open up a serial session with baud-rate baudrate of 9600 115200 and the right COM-port (visible in Device Manager).
   You may need to press the RESET-button.
   
   

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   Figure 4: Terminal(MicroBlaze output)

2.2 Reference Design - Introduction

We provide a reference design that interacts with most of the peripheral on the module. The provided design "TE0802 test board" shows how to connect the different parts of the module to simplify the development of your own application. You can use it for your own design but keep in mind the overall FPGA resources and power consumption before deployment.

The reference design we are introducing in this guide is "TE0802 test board". The most important steps to get it up and running are explained on TE0802 Test Board. The Download is available here.

The reference design is only usable with the specified Vivado/Vitis version. Always use the same version of Xilinx Software for one Project. (e.g. use reference design 2021.2.1 with vitis installation 2021.2.1)

1. Terminal example

   Image AddedImage Added

   
   

Hardware Setup and Power up in SD-Boot mode

Linux in SD-Boot mode

1. Download the source code and configuration files for "TE0802 test_board" reference design. Ensure that your download files match your Vivado version.

2. Run _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:

   Code Block
   language bash theme Midnight title _create_win_setup.cmd/_create_linux_setup.sh
   ------------------------Set design paths---------------------------- -- Run Design with: _create_win_setup -- Use Design Path: <absolute project path> -------------------------------------------------------------------- -------------------------TE Reference Design--------------------------- -------------------------------------------------------------------- -- (0) Module selection guide, project creation...prebuilt export... -- (1) Create minimum setup of CMD-Files and exit Batch -- (2) Create maximum setup of CMD-Files and exit Batch -- (3) (internal only) Dev -- (4) (internal only) Prod -- (c) Go to CMD-File Generation (Manual setup) -- (d) Go to Documentation (Web Documentation) -- (g) Install Board Files from Xilinx Board Store (beta) -- (a) Start design with unsupported Vivado Version (beta) -- (x) Exit Batch (nothing is done!) ---- Select (ex.:'0' for module selection guide):

   
   

3. Press '0' and enter to start "Module Selection Guide"
   1. Select your assembly version
   2. validate selection
   3. press '1' and enter to "create and open delivery binary folder"
4. Connect the MicroUSB cable from your module board with your PC
5. Connect peripherals to devices
   • VGA, display port → monitor
   • USB → keyboard
   • ...
6. Connect the module board with the power supply (5V)
7. Copy BOOT.bin, image.ub, init.sh and boot.scr on SD card (e.g. <project folder>\test_board\_binaries_TE0802-02-2AEV2-A\boot_linux)

8. Switch the DIP-Switch S1 to SD-Boot mode

   S1.1	S1.2	S1.3	S1.4
   ON	ON	OFF	OFF

   
   

9. Insert the SD card into the module board

10. Power on the module board

11. You can connect to the board with a program like PuTTY. Just open up a serial session with baudrate of 115200 and the right COM port (visible in Device Manager).

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    anchor Figure_

1. VHM title-alignment center title

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1. Terminal example

   Image AddedImage Added

   
   

2. Boot process

   1. Zynq Boot ROM loads FSBL from SD into OCM,

   2. FSBL init PS, programs PL using the bitstream and loads U-boot from SD into DDR,
   3. U-boot loads Linux (image.ub) from SD into DDR
3. For usage instructions please refer to chapter Linux application

Linux Application

After the Linux boot is complete, you can use the Linux shell and the connected peripherals

I2C

i2cdetect -l        (Shows a list of the available I2C buses)
i2cdetect -y -r 1   (check I2C 1 Bus)

Real Time Clock (RTC)

dmesg | grep rtc    (RTC check)
hwclock --test

Ethernet

udhcpc              (ETH0 check)
ifconfig			(shows the configuration of the network interface)

USB

lsusb               (USB check)

PCIe (M.2 SSD)

lspci               (PCIe check)

Audio

aplay /<link to mounted sd card>/<filename>.wav  (e.g. aplay /run/mount/sd/<filename>.wav)

VGA

• connect VGA to monitor and adjust source (it shows test pattern)

Display Port

• second linux console output will be shown on the monitor, when boot process is finished.
• connect keyboard to TE0802 USB, to interact with the second console
  • petalinux login: root
  • password: root

Webserver

• 
  

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  title insert IP on web browser to start web interface
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Startup Script

• If there is a start script named 'init.sh' on the SD card, it is loaded and executed shortly before the Linux boot process is completed.
• User bash code can be inserted on 'init.sh'

Monitoring input clock (25MHz)

• Open Vivado HW-Manager and add VIO signal to dashboard (*.ltx located on prebuilt folder)

• changed Value from 25MHz CLK to unsigned. Note: Frequency Counter is inaccurate and displayed unit is Hz

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userLEDs

• The user LEDs indicate a binary counter, which is reset by pressing one of the cross buttons

7-Segment LCD Display

• LCD is connected to counter

DIP-Switch

• Determines the reset start value from the binary counter of userLEDs

Figure 6: Vivado Address Editor - Address Mapping

For example the AXI GPIO IP Core which has a LED1 connected to it, can be controlled with software(C/C++) by raising the bits mapped to the address 0x4000 0000.

The VIO Core enables you to control connected IOs via the Vivado Hardware Manager(like LED2).

Notes

Document Revision History