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Modified TE0703 with TEM0007


Overview

TEM0007 module is a Microchip Polarfire SoC  module. 


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titleTEM0007 ModuleHardware overview

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Microchip Polarfire SoC MPFS250T, U2

  • 1 GByte LPDDR4 SDRAM, U6
  • Integrated 10/100/1000 Mbps Energy Efficient Ethernet Transceiver, U7
  • Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver, U11
  • Lattice Semiconductor MachXO2 System Controller CPLD, U1
  • B2B Connector Samtec Razor Beam, JM1...3
  • EEPROM, U10
  • Serial NOR Flash, U3


  • Required Hardware

    HardwareQuantityNote
    TEM00071Microchip Polarfire SoC Module
    Modified TE07031

    Carrier board

    Modified TE0703:

    • FTDI Firmware
    • Added second uart (uart0)
    • Additional Reset push button
    TE07901Universal USB2.0 to JTAG/UART
    Mini USB Cable2
    RJ45 Ethernet Cable1
    USB Stick1Optional
    Heatsink1
    Scroll Title
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    titleHardware overview
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    Modification TE0703

    -
    SD Jumper
    -
    XMOD UART(HSS)
    -
    JTAG FTDI
    -
    USB OTG
    -
    Reset Button


    Power supply

    Supply voltageCurrentDesignatorDescription
    5V2A*J13 on the carrier board

    *Current is dependent on design and the used heatsink. This value is recommend value. 

    DIP Switches

    In this case S2 dip switches can be use for JTAG adjustment only and it will not be used to select boot mode, because TEM0007 supports only SD card boot mode.

    S2-1S2-2S2-3S2-4Description
    CM1CM0JTAGENMIO0
    S2-2S2-3CM0JTAGENDescription
    OFFOFF11Access to TE0703 CPLD
    OFFON10Access to CPLD of B2B Module
    ONOFF01Access to TE0703 CPLD
    ONON00Access to FPGA of B2B Module

    Jumper

    alle Jumper und grenzen

    Resets

    There are one reset push button on the board. Second reset button can be added on the board as optional reset.

     SignalPush buttonFPGA PinSchematic labelNew design labelConnected toAccess on the carrier board viaDescription
    RESET (RESIN)S1H7DEVRST_N---TPS3106K33DBV chip RSTVDD Pin / CPLD of TEM0007 via B2B connector (SC_RESET / MR_n)S1This reset signal does not exist in Libero design. This reset signal resets FPGA via CPLD Firmware of TEM0007 module. By pushing S1 (RESIN) push button will set DEVRST_N to low.
    RESETNUser buttonH13B1_GPIO185_NRESETNJM2-Pin 73JB2-pin 74 /  J2C-C4User button does not exist on the carrier board. User button should be soldered by the user himself. (Optional) This button should be pulled up via a 10k resistor.

    Boot mode

    SD Card

    This module supports only supports  SD card boot mode. Therefore there There is no dip switch to select boot mode., But there is a jumper on the modified TE0703 carrier board to select SD card voltage correctly. For this purpose set jumper J11 of the carrier board for 3.3V voltage.

    Scroll Title
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    titleSet SD card voltage

    JTAG

    -TODO

    JTAG

    JTAG geht über MiniUSB und FTDI. Kein extra Programmer nötig


    UART

    There is two UART interfaces.

    UARTFPGA PinSchematic labelNew design labelConnected toAccess on the carrier board viaInterface forBaud rateDescription
    UART0C2 (TXD)UART_CON_TXMMUART_0_TXDJM1-Pin 99JB1-Pin 100 / J2A-Pin 31 (TXD)HSS (Hardware System Service)115200

    There is no connector on the TE0703 carrier board PCB REV06. In this case user should connect these pins to USB to JTAG/UART converter same as TE0790. (Crosstalk)


    D3 (RXD)UART_CON_RXMMUART_0_RXDJM1-Pin 97JB1-Pin 98 / J2A-Pin 30 (RXD) 
    UART1H5 (TXD)UART_TXMMUART_1_TXDJM1-Pin 85

    JB1-Pin 86 /
    J4 Mini USB connector

    Linux console / Bare metal interface115200
    H2 (RXD)UART_RXMMUART_1_RXDJM1-Pin  92JB1-Pin 91 /
    J4 Mini USB connector

    LED

    ETH

    USB

    I2C

    I2CFPGA PinSchematic labelNew design labelConnected toAccess on the carrier board viaDescription
    I2C0A3 (SCL)I2C_CON_SCLI2C_0_SCLJM1-Pin 95 JB1-Pin 96 (SCL)
    E3 (SDA)I2C_CON_SDAI2C_0_SDAJM1-Pin 93JB1-Pin 94 (SDA) 
    I2C1C1 (SCL)I2C_SCLI2C_1_SCLEEPROM chip U10 SCL pin No Access
     B1 (SDA)I2C_SDAI2C_1_SDAEEPROM chip U10 SDA pinNo Access
    CORE_I2CB8 (SCL)B1_GPIO175_NUSER_I2C0_SCLJM1-Pin 62JB1-Pin 61This additional i2c interface in generated via COREI2C. (Old names CORE_I2C_C0_INT , COREI2C_C0_SCL and COREI2C_C0_SDA)
    A8 (SDA)B1_GPIO175_PUSER_I2C0_SDAJM1-Pin 60JB1-Pin 59
    RPI_I2CF10 (SCL)B1_GPIO180_NUSER_I2C1_SCLJM2-Pin 85JB2-Pin 86This additional i2c interface in generated via COREI2C. (Old names RPi_ID_I2C_IRQ, RPi_ID_SC and RPi_ID_SD)
    B9 (SDA)B1_GPIO179_NUSER_I2C1_SDAJM1-Pin 68JB1-Pin 67





    Ethernet

    SignalFPGA PinSchematic labelNew design labelConnected toAccess on the carrier board viaDescription
    MAC_0_MDIOJ3ETH_MDIOMAC_0_MDIOEthernet Phy Chip (Marvell 88E1512-A0-NNP2I000)  Pin 8No Access
    MAC_0_MDOH6ETH_MDOMAC_0_MDOEthernet Phy Chip (Marvell 88E1512-A0-NNP2I000)  Pin 7No Access

    UART

    There is two UART interfaces.

    UARTFPGA PinSchematic labelNew design labelConnected toAccess on the carrier board viaInterface forBaud rateDescription
    UART0C2 (TXD)UART_CON_TXMMUART_0_TXDJM1-Pin 99JB1-Pin 100 / J2A-Pin 31 (TXD)HSS (Hardware System Service)115200

    There is no connector on the TE0703 carrier board PCB REV06. In this case user should connect these pins to USB to JTAG/UART converter same as TE0790. (Crosstalk)


    D3 (RXD)UART_CON_RXMMUART_0_RXDJM1-Pin 97JB1-Pin 98 / J2A-Pin 30 (RXD) 
    UART1H5 (TXD)UART_TXMMUART_1_TXDJM1-Pin 85

    JB1-Pin 86 /
    J4 Mini USB connector

    Linux console / Bare metal interface115200
    H2 (RXD)UART_RXMMUART_1_RXDJM1-Pin  92JB1-Pin 91 /
    J4 Mini USB connector
    COREUARTapbA7 (TXD)B1_GPIO173_PCOREUART_TXJM1-Pin 65JB1-Pin 66Additional UART interfaceDepends on system clock frequency.
    Baud_rate = clk/(Baudval+1)*16 and  Baudval = (clk/(1+Baudrate)) - 1
    This UART interface works via COREUARTapb in Libero.
    H15 (RXD)B1_GPIO7_NCOREUART_RXJM2-Pin 66JB2-Pin 65
    mBUS_UARTB20 (TXD)B1_GPIO19_PUSER_UART_TXJM2-Pin 46JB2-Pin 45Additional UART interface115200Old names mBUS_UART_TX, mBUS_UART_RX and mBUS_INT
    A21 (RXD)B1_GPIO20_NUSER_UART_RXJM2-Pin 32JB2-Pin 31
    A20 (INT)B1_GPIO20_PUSER_UART_INTJM2-Pin 34JB2-Pin 33


    GPIOs

    GPIOFPGA PinSchematic labelNew design labelConnected toAccess on the carrier board viaDescription
    GPIO_1_16E5ETH_RSTETH_PHY_RESETETH_RSTNo AccessPhy chip reset pin  (Marvell 88E1512-A0-NNP2I000). Necessary for reset pin of ethernet phy chip
    GPIO_1_17E4OTG-RSTUSB_PHY_RESETOTG-RSTNo AccessUSB phy chip reset pin (Microchip USB3320-EZK). Necessary for reset pin of usb phy chip
    GPIO_1_18B2---Not used---No Access
    GPIO_1_19A2---Not used---No Access
    GPIO_1_20B3GPIO1GPIO_1_20B2B JM1-Pin 91B2B JB1-Pin 92
    GPIO_1_23D4GPIO0GPIO_1_23B2B JM1-Pin 87B2B JB1-Pin 88
    GPIO_2_0U12B0_HSIO94_PNot used---No Access
    GPIO_2_1T13B0_HSIO95_NNot used---No Access
    GPIO_2_6R12B0_HSIO95_PNot used---No Access
    RPi_GPIO12D9GPIO174_PGPIO_2_2JM1-Pin 69JB1-Pin 70
    RPi_GPIO13D6GPIO168_NGPIO_2_3JM1-Pin 88JB1-Pin 87
    RPi_GPIO16C6GPIO171_PGPIO_2_4JM1-Pin 83JB1-Pin 84
    RPi_GPIO17H17GPIO8_NGPIO_2_5JM2-Pin 62JB2-Pin 61
    RPi_GPIO19B5GPIO170_NGPIO_2_7JM1-Pin 70JB1-Pin 69
    RPi_GPIO20C5GPIO170_PGPIO_2_8JM1-Pin 72JB1-Pin 71
    RPi_GPIO21C4GPIO169_PGPIO_2_9JM1-Pin 77JB1-Pin 78
    RPi_GPIO22F11GPIO181_NGPIO_2_10JM2-Pin 65JB2-Pin 66
    RPi_GPIO23F16GPIO11_NGPIO_2_11JM2-Pin 41JB2-Pin 42
    RPi_GPIO24D14GPIO2_NGPIO_2_12JM1-Pin 46JB1-Pin 45
    RPi_GPIO25E14GPIO9_NGPIO_2_13JM2-Pin 57JB2-Pin 58
    RPi_GPIO26B4GPIO169_NGPIO_2_14JM1-Pin 75JB1-Pin 76
    RPi_GPIO27G17GPIO8_PGPIO_2_15JM2-Pin 64JB2-Pin 63


    User IOs

    InputFPGA PinSchematic labelNew design labelConnected toAccess on the carrier board viaDescription
    SW1V19B0_HSIO72_NUSER_IN0JM3-Pin 42JB3-Pin 41
    SW2U18B0_HSIO74_N------No Access
    SW3W19B0_HSIO79_P------No Access
    SW4H13B1_GPIO185_NRESETNJM2-Pin 73JB2-Pin 74Used as RESETN Pin
    OutputFPGA PinSchematic labelNew design labelConnected toAccess on the carrier board viaDescription
    LED0V14B0_HSIO90_P------No Access
    LED1U13B0_HSIO93_N------No Access
    LED2T12B0_HSIO94_N------No Access
    LED3AB19B0_HSIO70_PUSER_OUT0JM3-Pin 60JB3-Pin 59


    PWM

    SignalFPGA PinSchematic labelNew design labelConnected toAccess on the carrier board viaDescription
    PWME11B1_GPIO183_NUSER_PWM0JM1-Pin 82JB1-Pin 81 / J1C-Pin C4






















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