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FPGA Devices

ZYNQ Devices

In Zynq System the main System Clock is connected PS (Processing Subsystem) and is not directly available to the PL (Programmable Logic - FPGA) unless the PS has enabled it during FSBL boot process.. So if we have a generic Zynq Board then we can not expect to have clocks available to the FPGA until the Processing system has provided them. There may be clocks available to the PL that are active when the PS is not booted but this not a requirement.

If our goal is to make a LED to blink, then the safest way is to use FPGA Configuration Master Clock this clock is always available and accessible in the same way, we do not need to know any specifics to the board we have. 

ZYNQ MPSoC Devices

Valid I/O Voltage

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