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Offset | Size | Content | Notes | |
---|---|---|---|---|
Application bitstream #2 | ||||
Application bitstream #2 | ||||
u-boot converted to SREC format | ||||
0x2000 | u-boot flash environment | Offset must be larger than size of FPGA bitstream | ||
0x000000 | GOLDEN bitstream with | First bootloader (like SREC | LoaderSPI Loader) is embedded in BRAM and loaded with the bitstream |
Xilinx SREC SPI loader is used to bootstrap u-boot into external memory, then u-boot is used for all flash operations as required. The image to be written can be loaded to external RAM and then written to SPI Flash as needed.
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