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Scroll Title
titleModule B2B FPGA-Banks and Voltages

Scroll Table Layout
orientationlandscape
sortDirectionASC
repeatTableHeadersdefault
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

-xx-15-xx-30B13HRB16HRVCCIOBB15HRVCCIOCB1250HRB14HR
Group123456789special
Module ModelBankIOsTypeVoltageBankIOsTypeVoltageBankIOsTypeVoltageBankIOsTypeVoltageBankIOsTypeVoltageBankIOsTypeVoltageBankIOsTypeVoltage


TE0710B1548HRVCCIOA--------B3450HRVCCIODB166HR3.3VB148HR3.3V2x 100Mbit ETH





TE0711B1548HRVCCIOAB3436HRVCCIOBB1418HR3.3VB3550HRVCCIODB166HR1.8VB148HR3.3VB348HRVCCIOBB34(4)USB
TE0712

B16

48HRVCCIOAB1320HRVCCIOBB1418HR3.3VB1550HRVCCIODB136HRVCCIOBB148HR3.3V

1x 100Mbit ETH / B13

4HRVCCIOB
B144x GTP on G2
TE0713





























4x GTP on G2

TE0715


with Z-7015
Z-7012S

B1348HRVCCIOAB3416HRVCCIOCB3418HRVCCIOCB3550HRVCCIODB5016MIO1.8VB5008MIO3.3V1x Gbit ETH


SGMIIUSB4x GTP on G2
TE0715
with Z-7030		B1348HRVCCIOAB3416HPVCCIOCB3418HPVCCIOCB3550HPVCCIODB5016MIO1.8VB5008MIO3.3V1x Gbit ETH


SGMIIUSB4x GTP on G2
TE0720B3548HRVCCIOAB3436HRVCCIOBB3318HRVCCIOCB1350HRVCCIODB5016MIO1.8VB5008MIO3.3V1x Gbit ETH


SGMIIUSB
TE0820*B6648HPVCCIOA B6516 HP VCCIOC B6518 HP VCCIOCB6450 HPVCCIODB5016MIO3.3V B5018MIO3.3V1x Gbit ETH


 SGMII USBTE07414x GTR on G2
TE0821*B2648HDVCCIOA B6516 HP VCCIOC B6518 HP VCCIOCB2448HDVCCIODB5016GTX1 LaneMIO3.3V B5018MIO3.3VGTX2 LanesGTXTE0742*TE0841B6448HRVCCIOAB6616HPVCCIOBB6818HPVCCIOCB6750HPVCCIODGTH1 LaneB658HR3.3VGTH2 LanesGTHTE0842*

I/O resource comparison for all 4x5 modules. There are maximum 4 user supplied I/O voltages (VCCIOA, VCCIOB, VCCIOC and VCCIOD).

Attention: Maximum supply voltage for HP banks is 1.8V.

Scroll Title
titleModule basic power and group pin assignment, recommended to verify with Schematics

Image Removed

Carrier Board Power Connection Table

1x Gbit ETH


 SGMII USB4x GTR on G2
TE0823*B6648HPVCCIOA B6516 HP VCCIOC B6518 HP VCCIOCB6450 HPVCCIODB5016MIO3.3V B5018MIO3.3V1x Gbit ETH


 SGMII USB4x GTR on G2
TE0741B1348HRVCCIOAB1616HRVCCIOBB1518HRVCCIOCB1250HRVCCIOD1x GTX1 Lane

B148HR3.3V2x GTX2 Lanes

1x GTX
4x GTX on G2
TE0742*






























TE0841B6448HRVCCIOAB6616HPVCCIOBB6818HPVCCIOCB6750HPVCCIOD1x GTH1 Lane

B658HR3.3V2x GTH2 Lanes

1x GTH
4x GTH on G2
TE0842*






























I/O resource comparison for all 4x5 modules. There are maximum 4 user supplied I/O voltages (VCCIOA, VCCIOB, VCCIOC and VCCIOD).

*Attention: Maximum supply voltage for HP banks is 1.8V.


Module Pinout Overview

Scroll Title
titleModule basic power and group pin assignment, recommended to verify with Schematics

Image Added


Carrier Board Power Connection Table

Scroll Title
titlePower Pin Connection on different Carrierboards

Scroll Table Layout
orientationlandscape
sortDirectionASC
repeatTableHeadersdefault
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

IO VoltageB2B Connector

Carrier Boards

NameDirection*JB1JB2TE0701TE0703 Rev01 - Rev04TE0703 Rev 05TE0705TE0706TEBA0841TEBA0841 REV01


PinPinSchematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.
PWR_1out2,4,61,3,5,75V05V3.3V3.3V3.3V3.3V5V05V3.3V3.3V3.3Vuse ext. 3.3V power supply3.3Vuse ext. 3.3V power supply
VCCIOAout10,12
Scroll Title
titlePower Pin Connection on different Carrierboards

Scroll Table Layout
orientationlandscape
sortDirectionASC
repeatTableHeadersdefault
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

IO VoltageB2B Connector

Carrier Boards

NameDirection*JB1JB2TE0701TE0703 Rev01 - Rev04TE0703 Rev 05TE0705TE0706TEBA0841TEBA0841 REV01
PinPinSchematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.
PWR_1out2,4,61,3,5,75V05V3.3V3.3V3.3V3.3V5V05V3.3V3.3V3.3Vuse ext. 3.3V power supply3.3Vuse ext. 3.3V power supply
VCCIOAout10,12VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO35

R23→M3.3VOUT

J1B-B1

VCCIOA

J5→M3.3VOUT, M1.8VOUT

R23→M3.3VOUT

J1-B1

VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO35R20->M3.3VOUT/J6B-B32VCCIOA

J26→ M1.8VOUT, 2.5V, 3.3V_OUT

J20-6,J20-45

VCCIOAJ26→ M1.8VOUT, 2.5V, 3.3V_OUT
J20-6,J20-45		VCCIODout8,10VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO13

R26→M3.3VOUT

J2B-B1

VCCIOD

J10→M3.3VOUT, M1.8VOUT

R26→M3.3VOUT

J2B-B1
VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO13VCCIO35R22->M3

R23→M3.3VOUT

/J6B

J1B-B1

VCCIODVCCIOA

J5→M3.3VOUT, M1.8VOUT

R23→M3.3VOUT

J1-B1

VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO35R20->M3.3VOUT/J6B-B32VCCIOA

J26→ M1.8VOUT, J27→ M1.8VOUT, 2.5V, 3.3V_OUT

J17J20-6,J17J20-45

VCCIODVCCIOAJ27→ J26→ M1.8VOUT, 2.5V, 3.3V_OUT
J17J20-6,J17J20-45PWR_2
VCCIODout
148,163V3IN10VIOTB

FMC_VADJ

2V5

3.

3V

3VOUT

VCCIO133.3V3.3V3.3V3.3V3V3IN3.3V3.3V3.3V3.3Vuse ext. 3.3V power supply3.3Vuse ext. 3.3V power supply

R26→M3.3VOUT

J2B-B1

VCCIOD

J10→M3.3VOUT, M1.8VOUT

R26→M3.3VOUT

J2B-B1

VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO13R22->M3.3VOUT/J6B-B1VCCIOD

J27→ M1.8VOUT, 2.5V, 3.3V_OUT

J17-6,J17-45

VCCIOD

J27→ M1.8VOUT, 2.5V, 3.3V_OUT

J17-6,J17-45

PWR_2out14,16
3V3IN3.3V3.3V3.3V3.3V3.3V3V3IN3.3V3.3V3.3V3.3Vuse ext. 3.3V power supply3.3Vuse ext. 3.3V power supply
VCCIOBout
2,4VCCIOBout2,4no name / VIOTA

FMC_VADJ

2V5

3.3VOUT

VCCIO34

J5→M3.3VOUT

J1B-B32

VCCIOB

J8→M3.3VOUT,M1.8VOUT

J2B-B32

VIOTB

FMC_VADJ

2V5

3.3VOUT

1.8V1.8VVCCIOB

J5→ M1.8VOUT, 2.5V, 3.3V_OUT

VCCIOBNCVCCIOCout6no name / VIOTA

FMC_VADJ

2V5

3.3VOUT

VCCIO33VCCIO34

R25→M3J5→M3.3VOUT

J2BJ1B-B32

VCCIOCVCCIOB

J9→M3J8→M3.3VOUT,M1.8VOUT

R25→M3.3VOUT

J2B-B32

VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO33R21->M3.3VOUTVCCIOC1.8V1.8VVCCIOB

J5→

J6→

M1.8VOUT, 2.5V, 3.3V_OUT

VCCIOBNC
VCCIOCNCPWR_M1inout
6no name / VIOTA

FMC_VADJ

2V5

9,11

3.3VOUT

3.3V		VCCIO333

R25→M3.3VOUT

3.3VM3.3VOUT3.3V3.3VOUT3.3VM3.3VOUT3.3V3.3V_OUT3.3V

J2B-B32

VCCIOC

J9→M3.3VOUT, M1.8VOUT

R25→M3.3VOUT

J2B-B32

VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO33R21->M3.3VOUTVCCIOCJ6→ M1.8VOUT, 2.5V, 3.3V_OUTVCCIOC3.3VNC
PWR_M2M1in40VIOB1.8VM1.8VOUT1.8VM1.8VOUT1.8VVIOB1.8VM1.8VOUT1.8VM1.8VOUT1.8VM1.8VOUT1.8V
9,113.3VOUT3.3V3.3VOUT3.3VM3.3VOUT3.3V3.3VOUT3.3VM3.3VOUT3.3V3.3V_OUT3.3V3.3V_OUT3.3V
PWR_M2in40
VIOB1.8VM1.8VOUT1.8VM1.8VOUT1.8VVIOB1.8VM1.8VOUT1.8VM1.8VOUT1.8VM1.8VOUT1.8V
PWR_M3in
20PWR_M3in20NCNC
NC
NC
NC
NC

NC
NC
PWR_VBATout80
VBATB1VBATJ7VBATJ7NC
VBATJ9VBATNCVBATNC

PWR_JTAG

in
92VCCJTAG
VCCJTAG
VCCJTAG
VCCJTAG
VCCJTAG
VCCJTAG
VCCJTAGNC

Power comparison of all 4x5 carrier boards. *Power direction based on carrier boards view.There are 4 variable user supplied I/O voltages (VCCIOA, VCCIOB, VCCIOC and VCCIOD). PWR_1 and PWR_2 are fixed from carrier boards. PWR_M1 and PWR_M2 normally use default value from module. NC=Not Connected

Attention: On some carrier boards the user supplied I/O voltages are connected together (red colored schematic names).

Carrier Pinout Overview

Scroll Title
titleCarrierboard basic power and group pin assignment (Top View), recommended to verify with Schematics

...

Scroll Title
title4x5 Module Controller IOs

Scroll Table Layout
orientationlandscape
sortDirectionASC
repeatTableHeadersdefault
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

NameModule B2B PinCarrier B2B PinDirection (Module view)DescriptionRecommendation
JTAGSELJM1-89JB1-90inJTAG Chain multiplexer. Low FPGA, High CPLD.  For module with CPLD only.

Connect Pulldown on carrier.
DIP switch possible.

SC_EN1JM1-28JB1-27inModule power. Set high to enable module power. Note: Power management depends on module. Sometimes this is a only used as Power ON Reset like SC_nRSTConnect Pullup on carrier.
DIP switch possible
SC_NOSEQJM1-7JB1-8in / inoutModule Power management. Set high to disable CPLD power management. Note: Power management depends on module and not all modules support extended power management with CPLD.Connect Pullup or force to GND over zero ohm resistor on carrier.
DIP switch possible.
SC_PGOODJM1-30JB1-29out / inoutPower Good signal. Is Low, if SC_EN1 is set to zero or if power is not ready, otherwise high impedance output. Note:  Power management depends on module.
On newer Firmware SC_PGOOD will be used as Additionally Boot Mode Pin.		Connect Pullup on carrier.
Do not use this signal to enable FPGA Bank voltages. It's only for monitoring. To Enable FPGA Banks, use 3.3V(PWR_M1) or 1.8V(PWR_M2) module output. 
SC_BOOTMODEJM1-32JB1-31inBoot Mode selection Pin for Zynq module only. Default low for primary SD boot and high for primary QSPI boot. Note: Depends also on module CPLD firmwareConnect Pullup on carrier.
DIP switch possible.
SC_nRSTJM2-18JB2-17inLow active module reset. Pin force Power one reset on FPGA/SoC. Note: Depending from module CPLD or voltage supervisor is used.Connect Pullup on carrier.
DIP switch possible.

Remove 4x5 module

Widget Connector
urlhttps://www.youtube.com/watch?v=uisv2dWbktc

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  • Controller IOs are 3.3V IOs


Note

It's planned to use SC_PGOOD also as additional Boot Mode Pin (Pin is bidirectional, pull up or force to zero), to additionally set JTAG only boot mode (to avoid programming problems with some vivado versions, see: AR#00002 - QSPI Programming issues). Current state of CPLD Redesigns: AVN-20220506 4 x 5 modules controller IOs redefinition and CPLD updates


Remove 4x5 module

4 x 5 SoMs Handling and Usage Precautions

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Compatibility Guide

Ethernet LED'S

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Solution A: connect to 3.3V out from the module, option compatible to all modules except those with HP banks (TE0715-01-30)

Solution B: connect to 1.8V out from the module, option compatible with all modules.

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