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Product Specification

Port Description

NameDirectionPinDescription
JTAGEN
ACBUS4          in
82Switch JTAG between CPLD and FPGA (logical one for CPLD, logical zero for FPGA)
96 
ACBUS5          
M_TMS
in
90
88 
M_TCK
ADBUS4          
in
out
91
98 
M_TDI
ADBUS7          
in
out
94
97 
M_TDO
BDBUS0          
out
inout
95 C_TMSout85 
87Module UART0.RX << FTDI
BDBUS1          inout86Module UART0.TX >> FTDI
C_TCKout81 
C_TDIout84 
C_TDOin83 
S1
C_TMS
in
out
75
85 
S2in74 
CM0in67 
CM1in66 
NOSEQ
EN_FMC          
inout
out
29
35 
EN1
EN1             out53 
RESIN
JTAGEN--82Enable JTAG access to CPLD for Firmware update (zero: JTAG routed to module, one: CPLD access)
JTAGMODEout
54 MODEout28 PGOODinout27 SDAinout ??? -DeleteSCLinout ???-DeleteMIO10inout32-not usedMIO11inout31-not usedMIO12inout39-not usedMIO13inout34-not usedMIO14inout40
58Enable JTAG access to CPLD for Firmware update on module CPLD (zero: JTAG routed to module FPGA, one: Module CPLD access) / currently_not_used (FPGA access only)
M_TCK           in91 
M_TDI           in94 
M_TDO           out95 
M_TMS           in90 
MIO10           inout32/ currently_not_used
MIO11           inout31/ currently_not_used
MIO12           inout39/ currently_not_used
MIO13           inout34/ currently_not_used
MIO14           inout40Module UART0.RX << BDBUS0
MIO15
MIO15           inout30Module  UART0.TX >> BDBUS1
ADBUS4
MODE            out
28 
NOSEQ           inout29
98
 
ADBUS7
PGOOD           
in
inout
97
27 
ACBUS4
PHY_LED1        
in
out
96
45 
ACBUS5in
PHY_LED1_A      out49
88
 
BDBUS0
PHY_LED2        
inout
out
87
47 
BDBUS1inout
PHY_LED2_A      out48
86
 
USB_OC
POK_FMC          36 
RESIN           out54 
S1              in75 
S2              in
99
74 
SD_
DETECT
DETECT       in42 
SD_
WP
WP           in43 
VID0
ULED1           out78 
ULED2           out
37
77 
VID1
ULED3           out
38-currently work on 35(EN_FMC)VID2
76 
ULED4           out
41
65 
EN_FMC
ULED5           out
35-currently work on 31 (MIO11)PG_C2Mout ??? -DeletePOK_FMCin36currently not usedPHY_LED1out45 PHY_LED2out47 PHY_LED1_Aout49 PHY_LED2_Aout48 LED1out78 LED2out77 LED3out76 LED4out65 LED5out71 LED6out70 LED7out69 LED8out68 dummyout51--remove unused pin
71 
ULED6           out70 
ULED7           out69 
ULED8           out68 
USB_OC          in99 
USR0 64 
USR1 61 
USR2 60 
USR3 59 
VID0            out37 
VID1            out38 
VID2            out41 
X6               19 
Y0               15 
Y1               14 
Y2               13 
Y3               10 
Y4               9 
Y5               8 
Y6               7 

 

Functional Description

Appx. A: Change History and Legal Notices

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