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Product Specification
Port Description
Name | Direction | Pin | Description |
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1.8V_EN / EN_1V8 | out | 106 | Power |
5V_EN | | 115 | (currently controlled via S4-4) / currently_not_used |
C_TCK | | 131 | JTAG J28 (XMOD2) / internal currently_not_used |
C_TDO | | 137 | JTAG J28 (XMOD2) / internal currently_not_used |
C_TDO1 | | 136 | JTAG J28 (XMOD2) / internal currently_not_used |
C_TMS | | 130 | JTAG J28 (XMOD2) / internal currently_not_used |
CLK_A / AUD_CLK | out | 1 | AUDIO U3 CLK |
CLK_CPLD / MEMS_CLKIN | in | 128 | U25 24,576MHz |
DONE | in | 67 | PS Done / currently_not_used |
EN_DDR | out | 86 | Enable DDR Power |
EN_FMC / FMC_EN | out | 104 | FMC |
EN_FPD | out | 81 | Enable PS FPD Power |
EN_GT_L | out | 77 | Enable GT Power |
EN_GT_R | out | 93 | Enable GT Power |
EN_LPD | out | 84 | Enable PS LPL Power |
EN_PL | out | 95 | Enable PL Power |
EN_PLL_PWR | out | 78 | Enable SI5345 Power |
EN_PSGT / EN_PSGTR | out | 75 | Enable PS GT Power |
ERR_OUT / ERROR | in | 70 | PS Error Out / currently_not_used |
ERR_STATUS / ERROR_STAT | in | 69 | PS Error Status / currently_not_used |
F1PWM | out | 121 | FAN1 |
F1SENSE | in | 125 | FAN1 |
FAN_FMC_EN | out | 132 | FMC FAN |
FMC_PG_C2M | | 141 | FMC / currently_not_used |
HD_LED_N / HDLED_N | out | 112 | J10 HD LED |
HD_LED_P / HDLED_P | out | 110 | J10 HD LED |
HDIO_SC0 / SC0 | in | 32 | FPGA IO |
HDIO_SC1 / SC1 | in | 33 | FPGA IO |
HDIO_SC2 / SC2 | in | 34 | FPGA IO |
HDIO_SC3 / SC3 | out | 35 | FPGA IO |
HDIO_SC4 / SC4 | out | 25 | FPGA IO |
HDIO_SC5 / SC5 | out | 26 | FPGA IO |
HDIO_SC6 / SC6 | in | 27 | FPGA IO / CLK |
HDIO_SC7 / SC7 | in | 28 | FPGA IO |
I2C_SCL / SCL | in | 50 | I2C / currently_not_used |
I2C_SDA / SCA | in | 52 | I2C / currently_not_used |
INIT_B / INIT | in | 68 | PS init B / currently_not_used |
JTAGENB |
| 120 | external Pin for CPLD Firmware Update |
LP_GOOD / PG_LPD | in | 83 | LP Power Good / currently_not_used |
MIO24 | | 38 | MIO / currently_not_used |
MIO25 | | 39 | MIO / currently_not_used |
MIO30 | | 48 | MIO / currently_not_used |
MIO31 | in | 49 | MIO / currently_not_used |
MIO32 | | 40 | MIO / currently_not_used |
MIO33 | | 41 | MIO / currently_not_used |
MIO34 | | 42 | MIO / currently_not_used |
MIO35 | | 43 | MIO / currently_not_used |
MIO36 | | 44 | MIO / currently_not_used |
MIO37 | | 45 | MIO / currently_not_used |
MIO40 | | 54 | MIO / currently_not_used |
MIO41 | | 55 | MIO / currently_not_used |
MIO42 | out | 60 | FPGA UART RX |
MIO43 | in | 61 | FPGA UART TX |
MIO44 | | 47 | / currently_not_used |
MOD_EN | out | 119 | Module Power 3.3V Enable |
MODE0 | out | 6 | Boot Mode |
MODE1 | out | 9 | Boot Mode |
MODE2 | out | 10 | Boot Mode |
MODE3 | out | 11 | Boot Mode |
MR / MRESETn | out | 92 | PS Reset |
PCI_SFP_EN | out | 76 | SFP |
PER_EN | out | 117 | Baseboard Power 3.3V Enable |
PERST / PERSTn | out | 139 | PCIE Resetn |
PG_DDR | in | 91 | Power Good / currently_not_used |
PG_FPD | in | 85 | Power Good / currently_not_used |
PG_GT_L | in | 96 | Power Good / currently_not_used |
PG_GT_R | in | 94 | Power Good / currently_not_used |
PG_PL | in | 82 | Power Good / currently_not_used |
PG_PLL_1V8 / PG_PLL | in | 73 | Power Good / currently_not_used |
PG_PSGT | in | 74 | Power Good / currently_not_used |
PLL_LOLN / PLL_LOL | in | 58 | Module U5 Si5345 / currently_not_used |
PLL_ |
RST Module U5 Si5345 |
PLL_SEL0 | out | 57 |
Module U5 Si5345 |
PLL_SEL1 | out | 59 |
Module U5 Si5345 |
POK_1V8 | | 107 | Power / currently_not_used |
POK_FMC | | 99 | FMC Power/ currently_not_used |
PROG_B | inout | 71 |
ATX J20 PS_ON_N |
PWR_BTN | in | 113 |
Power Button S1 or J10 |
PWRLED_N / LED_N | out | 111 |
J10 PWR |
PWRLED_P / LED_P | out | 109 |
ATX J20 PWROK |
RST_BTN | in | 114 |
Reset Button S2 or J10 |
S_1 | | 127 | Beeper/ currently_not_used |
SC_IO0 / X0 | out | 12 |
Master-Slave SC-Communication / Power Reset |
SC_IO1 / X1 | out | 13 |
Master-Slave SC-Communication / Power Reset |
SC_IO2 / X2 | out | 14 |
Master-Slave SC-Communication / currently_not_used |
SC_IO3 / X3 | out | 20 |
Master-Slave SC-Communication / currently_not_used |
SC_IO4 / X4 | in | 21 |
Master-Slave SC-Communication / currently_not_used |
SC_IO5 / X5 | in | 22 |
Master-Slave SC-Communication / currently_not_used |
SC_IO6 / X6 | in | 23 |
Master-Slave SC-Communication / Sanity check from other CPLD (FMC VADJ Enable) |
SC_IO7 / X7 | in | 24 |
Master-Slave SC-Communication / Sanity check from other CPLD (FMC VADJ Enable) |
SC_IO8 / dummy | | 126 | / currently_not_used / ! not available on PCB REV2 !
|
SC2_SW1 | in | 133 |
S5-1 / Boot Mode Selection |
SC2_SW2 | in | 138 |
S5-2 / Boot Mode Selection |
SD_A_EN | out | 140 |
MMC SD |
SD_CD / SD_CD_OUT | out | 65 |
SD Card detect to FPGA |
SD_CD_B | in | 143 |
Micro SD |
SEL_SD / SD_SEL | out | 62 |
Select SD |
SRST_B / SRSTn | out | 19 |
PS_SRST_B |
STAT_LED2 / LED2 | out | 98 |
LED D6 Green |
STAT_LED3 / LED3 | out | 97 |
LED D7 Red |
XMOD2_A / XMOD_TXD | out | 5 | J12 (XMOD 1) |
XMOD2_B / XMOD_RXD | in | 4 | J12 (XMOD 1) |
XMOD2_E / XMOD_LED | out | 3 | J12 (XMOD 1) |
XMOD2_G / XMOD_BTN | in | 2 | J12 (XMOD 1) |
Functional Description
JTAG
JTAGENB set carrier board CPLD into the chain for firmware update. For Update set DIP S4-3 to ON.
Power
Enable
Reset
Boot Mode
S4-1 | S4-2 | |
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ON | ON | Default, boot from SD/eMMC or SPI Flash if no SD is detected |
OFF | ON | Boot mode PJTAG0 |
ON | OFF | Boot from eMMC |
OFF | OFF | Boot mode main JTAG |
RGPIO
LED
Appx. A: Change History and Legal Notices
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