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If TE0726 module is powered by micro-USB connector J1 VBUS pin, which voltage level is controlled by supplying host according to the USB standards and should be 5V, there is not much user can control here if using standard USB equipment. However, user can also power the module by applying voltage to the J5 connector from other external sources. In both cases following maximum voltage ratings apply.
Absolute Maximum Ratings
Parameter | Min | Max | Units | Notes |
---|---|---|---|---|
Power supply voltage J1: USB_V_BUS J5: 5V | 4.75 | 5.25 | V | - |
VOUT of AP2152SG-13 | - | VIN + 0.3 | V | Output voltage. |
ILOAD of AP2152SG-13 | - | Internal limited | A | Maximum continuous load current. |
PS MIO supply voltage | -0.5 | 3.6 | V | See Xilinx DS187 datasheet |
PS MIO input voltage | -0.4 | VCCO_MIO + 0.55 | V | VCCO_MIO0_500 and VCCO_MIO1_501. |
PL |
HR I/O |
banks supply voltage | -0. |
5 | 3.6 |
V |
See Xilinx DS187 datasheet |
PL |
HR I/O banks input voltage | -0.4 | VCCO |
+ 0.55 | V |
See Xilinx DS187 datasheet | ||||
Storage temperature | -55 | +125 | °C | - |
See also the Xilinx datasheet DS187 for more information about absolute maximum ratings.
Recommended Operating Conditions
Parameter | Min | Max | Units | Notes |
---|---|---|---|---|
Power supply voltage J1: USB_V_BUS J5: 5V | 4.75 | 5.5 | V | See AP2152SG-13 datasheet. |
IOUT of AP2152SG-13 | 0 | 500 | mA | - |
PS MIO supply voltage | 1.71 | 3.465 | V | See Xilinx DS187 datasheet |
PS MIO input voltage | -0.2 | VCCO_MIO + 0.2 | V | VCCO_MIO0_500 and VCCO_MIO1_501. |
PL |
HR I/O |
banks supply voltage |
1. |
14 | 3.465 |
V |
See Xilinx DS187 datasheet |
PL |
HR I/O banks input voltage | -0.2 | VCCO |
+ 0.2 | V |
See Xilinx DS187 datasheet | ||||
Operating temperature | 0 | 70 | °C | See LAN9514 datasheet. |
The module operating temperature range depends on customer design and cooling solution. Please contact us for options.
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Physical Dimensions
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Date | Revision | Contributors | Description |
---|---|---|---|
2017-05-30 | Jan Kumann | Absolute maximum ratings. Layout redesign. Wiki link fixed. SoC model removed from BD. | |
2017-05-24 | V.2V2 | John Hartfiel | Weight. |
2017-05-24 | V.1V1 | Jan Kumann | Initial version. |
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