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Quad SPI Flash (U7) is connected to the Zynq PS QSPI0 interface via PS MIO bank 500, pins MIO1..6.
| MIO | Signal Name | U7 Pin |
|---|---|---|
| 1 | SPI-CS | C2 |
| 2 | SPI-DQ0/M0 | D3 |
| 3 | SPI-DQ1/M1 | D2 |
| 4 | SPI-DQ2/M2 | C4 |
| 5 | SPI-DQ3/M3 | D4 |
| 6 | SPI-SCK/M4 | B2 |
eMMC Interface
| MIO | Signal Name | U15 Pin |
|---|---|---|
| 46 | MMC-D0 | H3 |
| 47 | MMC-CMD | W5 |
| 48 | MMC-CLK | W6 |
| 49 | MMC-D1 | H4 |
| 50 | MMC-D2 | H5 |
| 51 | MMC-D3 | J2 |
Ethernet Interface
The Marvell Alaska 88E1512 (U8) is a physical layer device containing a single Gigabit Ethernet transceiver and three separate major electrical interfaces: MDI interface to copper cable, SERDES/SGMII interface and RGMII interface. RGMII interface is connected to the Zynq SoC PS bank 501 MIO pins, see section Default PS MIO Pin Mapping.
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| Include Page | ||||
|---|---|---|---|---|
|
| MIO | Signal Name | U7 Pin |
|---|---|---|
| 1 | SPI-CS | C2 |
| 2 | SPI-DQ0/M0 | D3 |
| 3 | SPI-DQ1/M1 | D2 |
| 4 | SPI-DQ2/M2 | C4 |
| 5 | SPI-DQ3/M3 | D4 |
| 6 | SPI-SCK/M4 | B2 |
Overview
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