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JX1-pinJX1-pin Schematic NameB2B Connector J3-pinJ3-in pin Schematic NameB2B Connector
C (pin 4)TCKJM1-90 4TCKJM1-90
D (pin 8)TDOJM1-88 8TDOJM1-88
F (pin 10)TDIJM1-86 10TDIJM1-86
H (pin 12)TMSJM1-92 12TMSJM1-92
A (pin 3)B14_L25 (usable as UART RX/TX-line)JM2-97 3B14_L25JM2-97 (usable as UART RX/TX-line)
B (pin 7)B14_L0 (usable as UART RX/TX-line)JM2-99 7B14_L0JM2-99 (usable as UART RX/TX-line)
E (pin 9)BOOTMODEJM2-100 9BOOTMODEJM2-100
G (pin 11)PROG_BJM1-94 11PROG_BJM1-94
--- 13XADC_PJM1-25 (ADC_P, decoupling capacitator 100 nF)
--- 14XADC_NJM1-27 (ADC_N, decoupling capacitator 100 nF)
--- 15CLK0_PJM1-2 (MGT_CLK0_P, 1KΩ serial resistor)
--- 16CLK0_NJM1-4 (MGT_CLK0_N, 1KΩ serial resistor)

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Note

Take care of the VCCO voltage ranges of the  particular PL IO-banks (HR, HP) of the mounted SoM, otherwise damages may occur to the FPGA. Therefore, refer to the TRM of the mounted SoM to get the specific information of the voltage ranges.

It is recommended to set and measure the PL IO-bank supply-voltages before mounting of TE 4x5 module to avoid failures and damages to the functionality of the mounted SoM.

 

Technical Specifications

Absolute Maximum Ratings

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DateRevisionAuthorsDescription
2017-0206-2027
Ali Nasericurrent TRM for TEBB0714-01
2017-01-30

0.1

Ali Naseri

Initial document

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