Page History

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• Xilinx XC7Z SoC (XC7Z020 or XC7Z014S)
  • Processing system (PS):
    
    • XC7Z020: Dual-core ARM Cortex-A9 MPCore™ with CoreSight™
    • XC7Z014S: Single-core ARM Cortex-A9 MPCore™ with CoreSight™
    • L1 cache: 32 KByte instruction, 32 KByte data per processor
    • L2 cache: Unified 512 KByte
  • Programmable logic (PL): Artix-7 FPGA
    • Programmable logic cells: 85K (XC7Z020), 65K (XC7Z014S)
    • Block RAM: 4.9 MByte (XC7Z020), 3.8 MByte (XC7Z014S)
    • DSP slices:  220 (XC7Z020), 170 (XC7Z014S)
    • Peak DSP performance: 276 GMACs (XC7Z020), 187 GMACs (XC7Z014S)
    • 2x 12 bit, MSPS ADCs with up to 17 differential inputs
• 54 multiuse I/O (MIO) pins
• 152 High-Range (HR) I/O pins (SelectIO interfaces)
• System Controller CPLD (Lattice LCMXO2-1200HC)
• Up to 1 GByte DDR3/L SDRAM memory, 2 x 256 Mbit x 16 (32-bit wide data bus). See also variants table.
• 32 MByte Quad SPI Flash memory
• Gigabit Ethernet transceiver PHY (Marvell 88E1512)
• MAC address serial EEPROM with EUI-48™ node identity (11AA02E48)
• Highly integrated full-featured hi-speed USB 2.0 ULPI transceiver (Microchip USB3320C-EZK)
• 3-axis accelerometer and 3-axis magnetometer (ST Microelectronics LSM303DTR) (Optional!) 
• Real time clock with embedded crystal (Intersil ISL12020M): ±5ppm accuracy
•  Atmel CryptoAuthentication element (Atmel ATSHA204A)
• Up to 32 GByte eMMC, usually 4 GByte, depends on module variant and assembly option
• User LED 1 (Green), user LED 2 (Red), user LED 3 - FPGA DONE (Green)
• On-board high-efficiency DC-DC converters for all voltages used
• Trenz 4 x 5 module socket connectors (3 x Samtec LSHM series connectors)
• Evenly spread supply pins for good signal integrity
• Rugged for shock and high vibration

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For more detailed information, refer to the TE0720 System Controller CPLD firmware page.

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DDR Memory

By default TE0720 module has two DDR3/L SDRAM chips arranged into 32-bit wide memory bus providing total on-board memory size up to 1 GBytes. Size of memory depends on the module variant, refer to the variants table.

Quad SPI Flash Memory

On-board 32-MByte QSPI flash memory S25FL256S (U7) is used to store initial FPGA configuration. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.

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Figure 5: TE0720 module physical dimensions.

Weight

ca 23 g - Plain module

Revision History

Hardware Revision History

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