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The TEC0330 FPGA board is a PCI Express card designed to fit into systems with PCI Express x8 slots (PCIe 2.0 or higher) and is PCIe Gen. 2 capable. See next section for the overview of FPGA MGT lanes routed to the PCIe interface.
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TEC0330 board JTAG interfaces accessing the FPGA or the System Controller CPLD:
| JTAG |
|---|
| Interface | Signal Schematic Name | JTAG Connector Pin |
|---|
| Connected to | |||
|---|---|---|---|
CPLD JTAG VCCIO: 3V3PCI Connector: J8 | CPLD_JTAG_TMS | J8-1 | SC CPLD, bank 0, pin 90 |
| CPLD_JTAG_TDI | J8-2 | SC CPLD, bank 0, pin 94 | |
| CPLD_JTAG_TDO | J8-3 | SC CPLD, bank 0, pin 95 | |
| CPLD_JTAG_TCK | J8-4 | SC CPLD, bank 0, pin 91 | |
FPGA JTAG VCCIO: 1V8 Connector: J9 | FPGA_JTAG_TMS | J9-4 | FPGA, bank 0, pin N9 |
| FPGA_JTAG_ |
| TMS | J9-6 | FPGA, bank 0, pin M8 |
| FPGA_JTAG_ |
| TCK | J9-8 | FPGA, bank 0, pin N8 | |
| FPGA_JTAG_TDI | J9-10 | FPGA, bank 0, pin L8 | |
FMC JTAG VCCIO: 3.3VPCI Connector: J2 | FMC_TRST | J2-D34 | SC CPLD, bank 2, pin 36 |
| FMC_ |
| TRST | J2-D29 | SC CPLD, bank 2, pin 27 |
| FMC_ |
| TCK | J2-D33 | SC CPLD, bank 2, pin 28 |
| FMC_ |
| TMS | J2-D30 | SC CPLD, bank 2, pin 31 |
| FMC_TDO | J2-D31 | SC CPLD, bank 2, pin 32 |
Table 10: JTAG Interface on TEC0330 board.
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DP0_C2M_N
| Connected to |
|---|
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