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JTAG Signal

J2 Connector Pin

TCK 4
TDI 9
TDO 10
TMS 8

On-board LEDs

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Green

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Red

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LED1, U4

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RGB_R, U1

RGB_G, U1

RGB_B, U1

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D6

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Green

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DONE, U1

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Reflects inverted DONE signal. ON when FPGA is not configured,

OFF as soon as PL is configured.

Default PS MIO Mapping

MIOFunctionConnector PinNotes
0---
1QSPI-SPI Flash-CS
2QSPI-SPI Flash-DQ0
3QSPI-SPI Flash-DQ1
4QSPI-SPI Flash-DQ2
5QSPI-SPI Flash-DQ3
6QSPI-SPI Flash-SCK
7GPIO-Green LED D2
8---
9---
28SD CARDJ8-5CLK
29SD CARDJ8-3CMD
30SD CARDJ8-7DAT0
31SD CARDJ8-8DAT1
32SD CARDJ8-1DAT2
33SD CARDJ8-2CD/DAT3
36I2C-SCL
37I2C-SDA
39GPIO-Si1143 INT pin
49SD CARDJ8-G4Card detect switch

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I2C DeviceSlave AddressNotes
 Si1143-A11-GMR0x5AProximity and ambient light sensor.

On-board Peripherals

On-board LEDs

LEDColorConnected ToDescription and Notes
D1RedLED2, U4 
D2

Green

MIO7, U1User controlled, default OFF (when PS7 has not been booted).
D3

Red

LED1, U4

 
D4RGB

RGB_R, U1

RGB_G, U1

RGB_B, U1

 
D5RedLED3, U4 

D6

Green

DONE, U1

Reflects inverted DONE signal. ON when FPGA is not configured,

OFF as soon as PL configuration is finished.

Power and Power-On Sequence

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Xilinx provide a power estimator excel sheets to calculate power consumption. It is also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.

Power InputTypical Current
3.3VTBD*

Table : Typical power consumption.

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