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For detailed information about the pin-out, please refer to the Pin-out Table.
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MGT Lanes
MGT (Multi Gigabit Transceiver) lane consists of one transmit and one receive (TX/RX) differential pairs, four signals total per one MGT lane. Following table lists lane number, MGT bank number, transceiver type, signal schematic name, board-to-board connector connection and Zynq SoC pin connection:
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| JTAGEN pin in B2B connector JM1 should be kept low or grounded for normal operation. |
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System Controller CPLD I/O Pins
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Table 8: Quad SPI interface signals and connections.
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SD Card Interface
SD Card interface is connected form the Zynq SoC's PS MIO bank 501 to the B2B connector JM1, signals MIO40 .. MIO45.
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Table 9: Ethernet interface.
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USB Interface
USB PHY is provided by USB3320 from Microchip. The ULPI interface is connected to the Zynq PS USB0. The I/O Voltage is fixed at 1.8V. The reference clock input of the PHY is supplied from an on-board 52.000000 MHz oscillator (U15).
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On-board I2C devices are connected to the Zynq SoC's PS bank 501 MIO48 (SCL) and MIO49 (SDA) which are is configured as I2C1 by default. As bank 501 VCC_MIO1_501 is fixed to 1.8V, there is a bi-directional voltage-level translator used to connect 3.3V I2C addresses for on-board devices are listed in the table belowslave devices to the bus. Table below lists I2C slave device addresses and functions:
| I2C Device | IC | I2C Slave Address | Notes | EEPROM||
|---|---|---|---|---|---|
| 24AA025E48 | U19 | 0x50 | Serial EEPROMs with EUI-48™ node identity. | ||
| ISL12020M | U16 | RTC0x6F | Low-power RTC with battery backed SRAM. | ||
| ISL12020M | U16 | Battery backed RAM0x57 | Integrated Battery backed SRAM integrated into RTC. | ||
| SI5338A | PLLU10 | 0x70 | Programmable quad clock generator. |
Table 11: Slave devices connected to the I2C interface.
On-board Peripherals
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A Microchip 24AA025E48 EEPROM (U19) is used which contains a globally unique 48-bit node address , that is compatible with EUI-48TM specification. The device is organized as two blocks of 128 x 8-bit memory. One of the blocks stores the 48-bit node address and is write protected, the other block is available for application use. It is accessible through the I2C slave device address 0x50.
RTC - Real Time Clock
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Overview
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