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Contributors

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modified-date
modified-date
dateFormatyyyy-MM-dd

Jan Kumann
  • Document template revision added.
  • Revised block diagram with new I2C part.
  • Sections rearranged and , some missing ones added.
  • Weight section removed.
2017-06-07

v.64

Jan KumannMinor formatting.
2017-03-02

v.59

Thorsten TrenzCorrected boot mode table.
2017-02-10

v.58

Thorsten TrenzCorrected PLL initial delivery state.
2017-01-25
v.55

 

Jan KumannNew block diagram.
2017-01-14

v.50

Jan Kumann
  • Product revision 04 images added.
  • Formatting changes and small corrections.
2016-11-15

v.45

Thorsten Trenz
Added B2B Connector section.
2016-10-18
v.40

Ali Naseri

Added table "power rails".
2016-06-28
v.38

 

Thorsten Trenz, Emmanuel Vassilakis, Jan Kumann

  • New overall document layout with shorter table of contents.
  • Revision 01 PCB pictures replaced with the revision 03 ones.
  • Fixed link to Master Pin-out Table.
  • New default MIO mapping table design.
  • Revised Power-on section.
  • Added links to related Xilinx online documents.
  • Physical dimensions pictures revised.
  • Revision number picture with explanation added.
2016-04-27v.33

Thorsten Trenz, Emmanuel Vassilakis

  • Added table "Recommended Operating Conditions".
  • Storage Temperature edited.
2016-03-31v.10

Philipp Bernhardt, Antti Lukats

Initial version.

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