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Table 5: MGT reference clock sources.
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JTAG Interface
JTAG access to the Xilinx Zynq-7000 is provided through B2B connector JM2.
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Table 12: Programmable clock generator I/Os.
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Oscillators
The module has following reference clock signals provided by on-board oscillators:
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TE0715-xx-30 has several HP banks on B2B connectors. Those banks have maximum voltage tolerance of 1.8V. Please check special instructions for the baseboard to be used with TE0715-xx-30. |
Power Consumption
Power supply with minimum current capability of 3A for system startup is recommended. The maximum power consumption of a module mainly depends on the design running on the FPGA.
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| Power Input Pin | Typical Current |
|---|---|
| VINTBD* | To be determined. |
| 3.3VINTBD | *To be determined. |
Table 15: Typical power consumption.
* TBD - To Be Determined.
Power supply with minimum current capability of 3A for system startup is recommended.
Power Distribution Dependencies
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Overview
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