Versions Compared

Old Version 4

changes.mady.by.user Ali Naseri

Saved on

compared with

New Version 5

changes.mady.by.user Ali Naseri

Saved on

Key

  • This line was added.
  • This line was removed.
  • Formatting was changed.

...

HTML
<!--
Download Link: Go to Base Folder of the Module or Carrier, for example : https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/TE0712
Use english URL "../en/..
 -->


Scroll Ignore

Download PDF version of this document.


Scroll pdf ignore

Table of Contents

Table of Contents

...

Table 3: General overview of PL I/O signals, SoM's interfaces and control signals  connected to the VG96 connectors.

HW-modification Concerning Reset-Signals

1) Use TE0729 SC CPLD firmware 'SC729_rev02org.jed' for correct functionality with HW modification) The pins with the schematic net names 'NRST_IN' (JB2-89) and 'NRST_OUT' (JB2-91) are swapped as part of a HW-modification to rework the Reset-signals of the Carrier-Board in conjunction with the TE0729 SoM.

Refer to the SC CPLD documentation, section "Watchdog" to get further detailed information about the Reset-functionality of the Carrier Board and SoM before and after the HW-modification and the required SC CPLD firmware revision of the TE0729 SoM for each version of the SoM.

JTAG Interface

JTAG access to the mounted SoM is provided through B2B connector JB2 and is also routed to the XMOD header JB3. With the TE0790 XMOD USB2.0 to JTAG adapter, the Zynq chip on the mounted SoM can be programed via USB2.0 interface.

...

When using XMOD FTDI JTAG Adapter TE0790, the adapter-board's VCC and VCCIO will be sourced by the Carrier Board. Set the DIP-switch with the setting:

...

XMOD DIP-switchesPosition
Switch 1ON
Switch 2OFF
Switch 3OFF
Switch 4ON

Table 13: XMOD module DIP-switch positions for voltage configuration.

...

On-board Peripherals

HTML
<!--
Components on the Module, like Flash, PLL, PHY...
  -->

...

DIP-switches S2Signal Schematic Net NameFunctionNote
S2-1JTAGSEL

Select Zynq chip or SC CPLD programming of mounted SoM:

OFF:  Zynq chip programming.
ON:    SC CPLD programming

Refer also to the TE0729 SC CPLD documentation for detailed information about JTAG update.
S2-2BOOT_MODE1Select first bit of boot mode codeRefer to TE0729 TRM and SC CPLD documentation for detailed information about boot modes.
S2-3BOOT_MODE2Select second bit boot mode code
S2-4xxnot used
boot mode code
S2-4xxnot used

Table 14: DIP-Switch S2 SoM configuration settings.

TE0729 Bootmodes

If TE0729 is mounted, following bootmodes can be configured by setting the DIP-switches S2-2 and S2-3:

Boot ModeS2-2S2-3
JTAGONON
SDOFFOFF
QSPIONOFF

Table 15: Bootmode configuration via DIP-switch S2.

The selected bootmode via DIP-switch S2 depends also on the current configured SC CPLD firmware on the mounted SoM and may varyTable 13: DIP-Switch S2 SoM configuration settings.

VCCIO Setting Jumper

The Carrier Board VCCIO for the PL IO-banks of the mounted SoM are selectable by the jumpers J6 and J7.

...

VCCIO
vs. Voltage Levels		VCCIO_13VCCIO_33Note
1.8VJ7:1-2J6:1-2-
2.5VJ7: 3-4J6:3-4-
3.3VJ7: 5-6J6: 5-6-

Table 1416: VCCIO jumper settings.

RTC Buffer Voltage Supply Header

...

LED ColorConnected toDescription and Notes
D1Red'MIO9', pin JB2- 88user LED

Table 1517: On-board LEDs.

Power and Power-On Sequence

...

Power InputTypical Current
5VINTBD*

Table 1618: Typical power consumption.

...

Module Connector (B2B) DesignatorVCC / VCCIODirectionPinsNotes
JB1

VIN33

Out

Pin 1, 2, 3, 4, 5, 6

3.3V module supply voltage
VCCIO_13OutPin 101, 102PL IO-bank VCCIO
VCCIO_33OutPin 29, 30PL IO-bank VCCIO
3.3VInPin 65, 66voltage output from module
JB2

1.8V

In

Pin 49

voltage output from module
2.5VInPin 13voltage output from module
USB-VBUSOutPin 107USB Host supply voltage
VBAT_INOutPin 118RTC buffer voltage

Table 1719: Power pin description of B2B Module Connector.

...

Jumper / Header DesignatorVCC / VCCIODirectionPinsNotes
J6VCCIO_33OutPin 2, 4, 6-
1.8VIn5-
2.5VIn3-
3.3VIn1-
J7

VCCIO_13

OutPin 2, 4, 6-
1.8VIn5-
2.5VIn3-
3.3VIn1-

Table 1820: Power Pin description of VCCIO selection jumper pin header.

...

Main Power Jack and Pins DesignatorVCC / VCCIODirectionPinsNotes
J125VINIn

-

-
J95VINInPin A1, A2'5VIN' power supply to the Carrier Board as alternative to J12
J2VBAT_INInPin 1Attention: Pin 2 connected to ground. VBAT_IN voltage on this pin cause short-circuit.

Table 1921: Main Power jack and pins description.

...

Peripheral Socket DesignatorVCC / VCCIODirectionPinsNotes
J10 / J11USB-VBUSOutPin 1USB2.0 Type A socket / Micro USB2.0 B socket
J1VIN33OutPin 4MikroSD Card socket VDD

Table 2022: Power pin description of peripheral connector.

...

XMOD Header DesignatorVCC / VCCIODirectionPinsNotes
JB33.3V-Pin 5not connected
VIOOutPin 6connected to VIN33

Table 2123: Power pin description of XMOD/JTAG Connector.

...

 Module Variant

Operating Temperature

USB SocketTemperature Range
TEB0729-02-A-40°C to +125°CUSB2.0 Type A socket fittedIndustrial
TEB0729-02-B-40°C to +125°CMicro USB2.0 B socket fittedIndustrial

Table 2224: Module variants.

Technical Specifications

...

Parameter

MinMax

Units

Reference Document

5VIN supply voltage

 -0.3 7

V

MP5010A, EN6347QI data sheet

Storage temperature

 -65

150

°C

-

Table 2325: Module absolute maximum ratings.

...

ParameterMinMaxUnitsReference Document
5VIN supply voltage 4.755.25 VUSB2.0 specification concerning 'VBUS' voltage
Operating temperature -40125°C-

Table 2426: Module recommended operating conditions.

...

DateRevision

Notes

PCNDocumentation Link
-

01

First Production Release

 -TEB0729-01
-02Second Production Release-TEB0729-02

Table 2527: Module hardware revision history.

...

Date

Revision

Contributors

Description

Page info
modified-date
modified-date
dateFormatyyyy-MM-dd



Ali Naseriinitial document

Table 2628: Document change history.

...