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| Scroll Title |
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| anchor | Table_OV_IDS |
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| title | Initial delivery state of programmable devices on the module |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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Storage device name | Content | Notes |
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Quad SPI Flash | Not Programmed |
| | EEPROM | Programmed | Programmable Oscillator ConfigurationEthernet MAC | | DDR3 SDRAM | Not Programmed |
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Configuration Signals
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| Scroll Title |
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| anchor | Table_OBP_SPI |
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| title | Quad SPI interface MIOs and pins |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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|
| Designator | Schematic | Connected to | Notes |
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U1
| NCSO | CSS Bank (Configuration Bank) | Used when you are not configuring using AS | | DCK | DCLK | AS Configuration Clock | | AS_DATA0 | CSS Bank (Configuration Bank) | AS Configuration Pin |
| | AS_DATA1 | CSS Bank (Configuration Bank) |
| | AS Configuration DataAS_DATA2 | CSS Bank (Configuration Bank) | AS Configuration Data |
| | AS_DATA3 | CSS Bank (Configuration Bank) | AS Configuration Data |
| | U3 | QSPI_CS | Bank 2A |
| | QSPI_CK | Bank 2A |
| | QSPI_DATA0 | Bank 2A |
| | QSPI_DATA1 | Bank 2A |
| | QSPI_DATA2 | Bank 2A |
| | QSPI_DATA3 | Bank 2A |
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| Scroll Title |
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| anchor | Table_OBP_EEP |
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| title | I2C EEPROM interface MIOs and pins |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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|
| Schematic | U64 EEPROM Pin | B2B | U18 Intel Max 10 Pin | Notes |
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| I2C_SCL | SCL | J3-135 |
Connected to Intel Max 10 (U18) - Bank 2, and Oscillator Si5345 (U14)J3-137 | Connected to Intel Max 10 (U18) - Bank 2, and Oscillator Si5345 (U14)
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| Scroll Title |
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| anchor | Table_OBP_I2C_EEPROM |
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| title | I2C address for EEPROM |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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|
| Pins | I2C Address | Designator | Notes |
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| I2C_SCL, I2C_SDA | 0x53 | U64 |
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- Part number: IS43TR16512BL
- Supply voltage: 1.35V35 V
- Speed: 800MHz: Half rate: 533 MHz; Quarter rate: max. 800 MHz
- Temperature: -40 °C to 95 °C
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| Scroll Title |
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| anchor | Table_OBP_ETH |
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| title | Ethernet PHY to Intel Cyclone 10 GX SoC connections |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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|
| Signal Name | Connected to | B2B | Signal Description |
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PHY1_MDI0_P PHY1_MDI0_N | - - | J2-93 J2-91 |
| PHY1_MDI1_P PHY1_MDI1_N | - - | J2-87 J2-85 |
| PHY1_MDI2_P PHY1_MDI2_N | - - | J2-81 J2-79 |
| PHY1_MDI3_P PHY1_MDI3_N | - - | J2-75 J2-73 |
| | ETH1_RST | U23, Bank 2A | - | Pulled-up to DVDDH Voltage. | | ETH1_MDC | U23, Bank 2A | - | Pulled-up to DVDDH Voltage. | | ETH1_MDIO | U23, Bank 2A | - | Pulled-up to DVDDH Voltage. | | ETH1_TXD0...7 | U23, Bank 2A | - | 8 bit Transfer | | ETH1_RXD0...7 | U23, Bank 2A | - | 8 bit Receive | | ETH1_GTXCK | U23, Bank 2A | - |
| | ETH1_TXCLK | U23, Bank 2A | - |
| | ETH1_TXEN | U23, Bank 2A | - |
| | ETH1_TXER | U23, Bank 2A | - |
| | ETH1_RXCK | U23, Bank 2A | - | Pulled-down to GND. | | ETH1_RXDV | U23, Bank 2A | - | Pulled-down to GND. | | PHY1_INT | - | - | Pulled-up to DVDDH Voltage. | | PHY1_LED1 | U18, Bank 2 | - | Pulled-up to DVDDH Voltage. | | PHY1_LED2 | U18, Bank 2 | - | Pulled-down to GND. | | ETH1_CRS | U23, Bank 2A | - |
| | ETH1_XTAL_IN | ETH_CLKIN | - | From U21 (25MHz MEMS 25 MHz Oscillator) |
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Intel MAX 10
The TEI0006 is equipped with an Intel MAX 10 device which is a single-chip, non-volatile low-cost programmable logic device (PLD) to integrate the optimal set of system components. Intel MAX 10 (U18) is power and configuration controller on TEI0006 SoM.
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Clock Sources
The TEI0006 has three MEMS crystal oscillator and a programmable clock generator.
| Scroll Title |
|---|
| anchor | Table_OBP_CLK |
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| title | Osillators |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
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| Designator | Description | Frequency | Note |
|---|
| U21 | MEMS Crystal Oscillator | 25MHz |
| | U15 | MEMS Crystal Oscillator | 25MHz |
| | U17 | MEMS Crystal Oscillator | 48MHz |
| | U14 | Programmable Oscillator | Variable |
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| Scroll Title |
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| anchor | Table_OBP_CLK_PO |
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| title | Programmable Oscillator connections |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Signals | Clock Type | In/ Out | Connected to | Frequency | Note |
|---|
IN0_P IN0_N | Differential | In In | Oscillator, U15 GND | 25 MHz |
| | IN1..3 | Differential | In | B2B, J3 | Variable |
| XA XB | Differential |
| Oscillator, U17 GND | 48 MHz |
| CLK0 | Differential | Out | Intel Cyclon 10 GX (U23)- Bank 2A | User25 MHz | Default off | CLK1...4 | Differential | Out | B2B, J3 | User | Default off25 MHz | | REFCLK_EMIFP | Differential | Out | Intel Cyclon 10 GX (U23)- Bank 3B | UserVariable | Default off | | CLK6...7 | Differential | Out | Intel Cyclon 10 GX (U23)- Bank 1D | User | Default offVariable | | CLK8...9 | Differential | Out | Intel Cyclon 10 GX (U23)- Bank 1C | UserVariable | Default off |
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Power and Power-On Sequence
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| Scroll Title |
|---|
| anchor | Table_PWR_PR |
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| title | Module power rails. |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Power Rail Name | B2B Connector J1 Pin | B2B Connector J2 Pin | B2B Connector J3 Pin | Voltage Level | Direction | Notes |
|---|
| VIN | 145, 147,149, 151, 153, 155, 157, 159 | - | - | 5 V | Input |
| | VCCIO2K | 53, 54 | - | - | 1.2 V, 1.25 V, 1.35 V, 1.5 V, 1.8 V, 2.5 V or 3.0 V | Input |
| | VADJ | 140,142 | - | - | adjustable between 1.8 V - 3.0 V | Output | Voltages according to EP53A8HQI datasheet but restricted to allowed bank voltage | | VCCIO2J | - | 29,30 | - | 1.2 V, 1.25 V, 1.35 V, 1.5 V, 1.8 V, 2.5 V or 3.0 V | Input |
| 3.3V | - | 149,150 | - | 3.3 V | Output |
| | 1.8_VIO | - | - | 139 | 1.8 V | Output |
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Operating Temperature: -55°C ~ to 125°C
Current Rating: 1.6 A per Pin (2 pins powered)
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| Scroll Title |
|---|
| anchor | Table_TS_ROC |
|---|
| title | Recommended operating conditions. |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Parameter | Min | Max | Unit | Reference Document |
|---|
| VIN | 5.0 | 5.0 | V |
| | VCCIO | 2.85 | 3.15 | V | See Intel Cyclone 10 GX datasheet. | | VADJ | 2.85 | 3.15 | V | VCCIO | T_OP | 0 | 85 | °C |
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Physical Dimensions
Module size: 60 mm × 80 mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: 5 mm.
- PCB thickness: 1.7 mm
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