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- Select Voltage VCCA_SD of 4x5 module bank where SD-Card is connected by Jumper J7 (1-2 →3.3V; 2-3 1.8V). Compare TRM of actually used 4x5 module.
- Select VCCIOA Voltage by setting J4 (1-2 →3.3V; 2-3 1.8V). If both FFA and FFB are not used any setting is ok. Do not leave open (communication of 4x5 module with TEF1002 CPLD is only possible with availabe VCCIOA)!
Dip Setting Note S1 Push button configured as reset S2-1
OFF FMC _VADJ OFF. The choice OFF, ON, OFF selects 1.8V FMC_VADJ, wich is a valid bank power for TE0720.
S2-2 OFF S2-3 OFF S2-4 ON Selects 4x5 module SOC/FPGA JTAG S2-5 ON S2-6 OFF S2-7 ON Module power enable. S2-8 ON Use extended power sequenzing. S3-1 OFF/ON For Zynq modules: Primary Boot Mode SD/QSPI. S3-2 OFF ON for TE0720 (overide automatic enable FMC__VADJ). For TE0720 bank bank 34 has to be powerded to start up. Therefore FMC VADJ has to be set to a valid value e.g. 1.8V - Connect 12V ATX connector
- Connect mico USB J10 to PC
- Use Xilinx JTAG tools to programm FPGA or for Zynq modules use micro SD Card.
- Use e.g. Putty on PC to check for UART interactions.
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Single 12V power supply with minimum current capability of 3A is recommended to power on the board via the 6-pin PCI-E ATX connector.
DIP-Switches and Push Buttons
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Select dip switch settings according to the attached 4x5 module and your needs.There is a switch (S??) which is connected to RESET signal, it resets the system entirely.
Compare Dip switch setting with TRM of your module and table in TRM of TEF1002
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