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The Intel/Altera MAX10 10M08SAU169C8G System Controller CPLD (U11) is the central system management unit where essential control signals are logically linked by the implemented logic in CPLD firmware. It generates output signals to control the system, the on-board peripherals and the interfaces. The JTAG and I2C between the on-board peripherals and the attached module are by-passed, forwarded and controlled by the System Controller CPLD. A main tasks of the System Controller CPLD is the monitoring of the power-on sequence and configuring the state of the attached module. For detailed information, refer to the firmware documentation of the SC CPLD. Table below lists the SC CPLD I/O signals and pins:

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