Page History

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SoC/FPGA
- Xilinx UltraScale+ RFSoC (XCZU25DR-1FFVE1156E)
  - Package: E1156
  - Speed: -1 (slowest)
  - Temperature: Extended (0 to +100 °C)
RAM/Storage
- 4x 8Gb DDR4
- 2x 512Mb SPI Flash
- 2k I²C EEPROM
On Board
- Lattice MachXO2 CPLD
- Programmable Clock Generator
- 3x Oscillators
Interface
- 2x Samtec ST5 (2x80 pol) Board to Board Connectors
Power
- 5V Input Supply Voltage
Dimension
- 90 x 65 mm

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Scroll Title

anchor	Table_OV_BP
title	Boot process.

Scroll Table Layout

MODE[0:3]	Boot Mode

Connected to

Pin Location	Note
0000	PS_JTAG	JTAG	PSJTAG Interface
0001	Quad SPI (24b)	MIO0...12	QSPI 24bit addressing
0010	Quad SPI (32b)	MIO0...12	QSPI 32bit addressing
0011	SD0 2.0	MIO13...25	SD 2.0
0100	NAND	MIO9...25	Requires 8 bit data bus width
0101	SD1 2.0	MIO31...51	SD 2.0
0110	eMMC	MIO13...22	eMMC version 4.5 at 1.8 V
0111	USB2.0	MIO52...63	Only USB2.0
1000	PJTAG	MIO26...29	PJTAG Connection 0 0ption
1001	PJTAG	MIO12...15	PJTAG Connection 1 0ption
1110	SD1 LS 3.0	MIO39...51	SD 3.0 with complaint voltage level shifter

Scroll Title

anchor	Table_OV_RST
title	Reset process.

Scroll Table Layout

Signal	B2B	I/O	Note
RESETN	J1-36	Input	Pulled up to 3.3V_CPLD

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