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The Trenz Electronic TE0823 (3PIU1FA /3PIU1FL)  is an industrial-grade MPSoC module integrating a low power Xilinx Zynq UltraScale+ MPSoC, 1 GByte LPDDR4 SDRAM, 128 MByte 8 GB eMMC chip, 2x 64 MB Flash memory for configuration and operation, and powerful switch-mode power supplies for all on-board voltages. A large number of configurable I/O's is provided via rugged high-speed stacking connections. The module is equipped with a Lattice Mach XO2 CPLD for system controlling. 3x Robust high-speed connectors provide a large number of inputs and outputs.

The highly integrated modules are All this on a tiny footprint, smaller than a credit card , at the most competitive price. Modules in and are offered in several variants at an affordable price-performance ratio. Modules with a 4 x 5 cm form factor are fully completely mechanically and largely electrically compatible among with each other.

All parts are at least industrial temperature range. The module operating temperature range depends on customer design and cooling solution. Please contact us for options.

Refer to http://trenz.org/te0823-info for the current online version of this manual and other available documentation.

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  • SoC/FPGA
    • Package: SFVC784, SFRC784
    • Device: ZU2 ...ZU5, *
    • Engine:  EG, CG, EV, *
    • Speed: -1, -1L, -2, -2L, 3, *, **
    • Temperature: I, E, *, **
  • RAM/Storage
    • 2x  DDR4 SDRAM,
      • Data Width: 32 Bit
      • Size: 16 Gb, *
      • Speed: 3733 Mbps, ***
    • 2x QSPI boot Flash in dual parallel mode
      • Data Width: 8 Bit
      • Size: 512 Mb Gb, *
    • 1x e.MMC Memory
      • Data Width: 8 Bit
      • Size: 32 Gb, *
    • MAC address serial EEPROM
  • On Board
    • Lattice MachXO2 CPLD
    • Programmable Clock Generator
    • Hi-speed USB2 ULPI Transceiver
    • 4x LEDS
  • Interface
    • 1x GB/s serial GMII interface
    • 1x Hi-speed USB2 ULPI transceiver with full OTG support
    • 154 x High Performance (HP) und 96 x High Density (HD) I/Os
    • 78 x PS MIOs
    • 4 x serial PS GTR transceivers
      • PCI Express interface version 2.1 compliant
      • SATA 3.1 specification compliant interface
      • DisplayPort source-only interface with video resolution up to 4k x 2k

      • USB 3.0 specification compliant interface implementing a 5 Gbit/s line rate
  • Power
    • All power regulators on board
  • Dimension
    • 40 x 50 mm
  • Note
    • * depends on assembly version
    • ** also non low power assembly options possible
    • *** depends on used U+ Zynq and DDR4 combination
    • Rugged for shock and high vibration

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Main Components

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MODE Signal State

Boot Mode
LowHigh

QSPI*

HighLowSD Card*

*changable also with other CPLD Firmware:TE0823 CPLD



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Signal

B2BI/ONote

RESIN

JM2-18Input


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Notes :

Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3)

The TE0821 TE0823 SoM has dual 8 Gb volatile DDR4 a 1 GB volatile LPDDR4 SDRAM IC for storing user application code and data.

  • Part number: K4A8G165WB-BIRC IS43LQ32256A
  • Supply voltage: voltage: 1.7V ~ 1.2V95V
  • Speed: 2400 3200 Mbps
  • Temperature: -40 ~ 95 °C

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Power-On Sequence

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  • use "include page" macro and link to the general B2B connector page of the module series,

    For example: 6 x 6 SoM LSHM B2B Connectors

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    PD:6 x 6 SoM LSHM B2B ConnectorsPD:
    6 x 6 SoM LSHM B2B Connectors

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PD:4 x 5 SoM LSHM B2B ConnectorsPD:
4 x 5 SoM LSHM B2B Connectors

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ParameterMinMaxUnitsReference Document
VIN supply voltage3.36VSee TPS82085S datasheet
3.3VIN supply voltage3.33.465VSee LCMXO2-256HC, Xilinx DS925 datasheet
PS I/O supply voltage, VCCO_PSIO1.7103.465VXilinx document DS925
PS I/O input voltage–0.20VCCO_PSIO + 0.20VXilinx document DS925
HP I/O banks supply voltage, VCCO0.9501.9VXilinx document DS925
HP I/O banks input voltage-0.20VCCO + 0.20VXilinx document DS925
Voltage on SC CPLD pins-0.33.6VLattice Semiconductor MachXO2 datasheet
Operating Temperature Range085°CXilinx document DS925, extended grade Zynq temperarure range


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DateRevisionContributorDescription

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  • Bugfix document style

2021-08-23v.42Pedram Babakhani
  • Bugfix Boot mode
2020-11-02v.40Pedram Babakhani
  • Initial Release

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