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Template Revision 2.12

  • Module: TRM Name always "TE Series Name" +TRM
    Example: "TE0728 TRM"
  • Carrier: TRM Name usually "TEB Series Name" +TRM
    Example: "TEB0728 TRM"


HTML
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Important General Note:

  • If some section is configurable and depends on Firmware, please refer to the addition page (for example CPLD). If not available, add note, that this part is configurable
  • Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

    • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
      • Figure template:

        Scroll Title
        anchorFigure_anchorname
        titleText


        Scroll Ignore

        Create DrawIO object here: Attention if you copy from other page, objects are only linked.


        Scroll Only

        image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed



      • Table template:

        • Layout macro can be use for landscape of large tables

      • Scroll Title
        anchorTable_tablename
        titleText

        Scroll Table Layout
        orientationportrait
        sortDirectionASC
        repeatTableHeadersdefault
        style
        widths
        sortByColumn1
        sortEnabledfalse
        cellHighlightingtrue

        ExampleComment
        12



    • The anchors of the Scroll Title should be named consistant across TRMs. A incomplete list of examples is given below

      • <type>_<main section>_<name>

        • type: Figure, Table
        • main section:
          • "OV" for Overview
          • "SIP" for Signal Interfaces and Pins,
          • "OBP" for On board Peripherals,
          • "PWR" for Power and Power-On Sequence,
          • "B2B" for Board to Board Connector,
          • "TS" for Technical Specification
          • "VCP" for Variants Currently in Production
          •  "RH" for Revision History
        • name: custom, some fix names, see below
      • Fix names:
        • "Figure_OV_BD" for Block Diagram

        • "Figure_OV_MC" for Main Components

        • "Table_OV_IDS" for Initial Delivery State

        • "Table_PWR_PC" for Power Consumption

        • "Figure_PWR_PD" for Power Distribution
        • "Figure_PWR_PS" for Power Sequence
        • "Figure_PWR_PM" for Power Monitoring
        • "Table_PWR_PR" for Power Rails
        • "Table_PWR_BV" for Bank Voltages
        • "Table_TS_AMR" for Absolute_Maximum_Ratings

        • "Table_TS_ROC" for Recommended_Operating_Conditions

        • "Figure_TS_PD" for Physical_Dimensions
        • "Table_VCP_SO" for TE_Shop_Overview
        • "Table_RH_HRH" for Hardware_Revision_History

        • "Figure_RH_HRN" for Hardware_Revision_Number
        • "Table_RH_DCH" for Document_Change_History
    • Use Anchor in the document: add link macro and add "#<anchorname>
    • Refer to Anchror from external : <page url>#<pagename without space characters>-<anchorname>



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-----------------------------------------------------------------------


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Note for Download Link of the Scroll ignore macro:


Scroll Ignore

Download PDF version of this document.


Scroll pdf ignore

Table of Contents

Table of Contents

Overview

The Trenz Electronic TE0xxx-xx ... is an industrial-grade ... module ... based on Xilinx ...

Refer to http://trenz.org/tec0850-info for the current online version of this manual and other available documentation.

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Notes :

Key Features

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Note:
 'description: Important components and connector or other Features of the module
→ please sort and indicate assembly options

Key Features'  must be split into 6 main groups for modules and mainboards:

  • SoC/FPGA
    • Package: SFVC784
    • Device: ZU2...ZU5*
    • Engine: CG, EG, EV*
    • Speed: -1LI, -2LE,*, **
    • Temperature: I, E,*, **
  • RAM/Storage
    • Low Power DDR4 on PS
      • Data width: 32bit
      • Size: def. 2GB*
      • Speed:***
    • eMMC
      • Data width: 8Bit
      • size: def. 8GB *
    • QSPI boot Flash in dual parallel mode (size depends on assembly version)
      • Data width: 8bit
      • size: def. 128MB *
    • HyperRAM/Flash (optional, default not assembled)
      • size:*
    • MAC address serial EEPROM with EUI-48™ node identity (Microchip 24AA025E48)
  • On Board
    • Lattice LCMXO2
    • PLL SI5338
    • Gigabit Ethernet transceiver PHY (Marvell Alaska 88E1512)
    • Hi-speed USB2 ULPI transceiver with full OTG support (Microchip USB3320C)
  • Interface
    • 132 x HP PL I/Os (3 banks)
    • ETH
    • USB
    • 4 GTR (for USB3, Sata, PCIe, DP)
    • MIO for UART
    • MIO for SD
    • MIO for PJTAG
    • JTAG
    • Ctrl
  • Power
    • 3.3V-5V Main Input
    • 3.3V Controller Input
    • Variable Bank IO Power Input
  • Dimension
    • 4 cm x 5 cm
  • Notes
    • * depends on assembly version
    • ** also non low power assembly options possible
    • *** depends on used U+ Zynq and DDR4 combination


Key Features'  must be split into 6 main groups for carrier:

  • Modules
    • TE0808, TE807, TE0803,...
  • RAM/Storage
    • E.g. SDRAM, SPI
  • On Board
    • E.g. CPLD, PLL
  • Interface
    • E.g. ETH, USB, B2B, Display port
  • Power
    • E.g. Input supply voltage
  • Dimension


  • <Replace for module use "SoC/FPGA" for Carrier "Modules">
    • ...
  • RAM/Storage
    • ...
  • On Board
    • ...
  • Interface
    • ...
  • Power
    • ...
  • Dimension
    • ...
  • Notes
    • ...


Block Diagram

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add drawIO object here.

Note

For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .



Scroll Title
anchorFigure_OV_BD
titleTExxxx block diagram


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Main Components

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Notes :

  • Picture of the PCB (top and bottom side) with labels of important components
  • Add List below


Note

For more information regarding how to add board photoes, Please refer to "Diagram Drawing Guidline" .



Scroll Title
anchorFigure_OV_MC
titleTExxxx main components


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  1. ...
  2. ...
  3. ...

Initial Delivery State

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Notes :

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty


Scroll Title
anchorTable_OV_IDS
titleInitial delivery state of programmable devices on the module

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Storage device name

Content

Notes

Quad SPI Flash



EEPROM


System Controller CPLD











Configuration Signals

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  • Overview of Boot Mode, Reset, Enables.


Scroll Title
anchorTable_OV_BP
titleBoot process.

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MODE Signal State

Boot Mode








Scroll Title
anchorTable_OV_RST
titleReset process.

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Signal

B2BI/ONote










Signals, Interfaces and Pins

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Notes :

  • For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
    • SD
    • USB
    • ETH
    • FMC
    • ...
  • For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
    • JTAG
    • UART
    • I2C
    • MGT
    • ...

Board to Board (B2B) I/Os

FPGA bank number and number of I/O signals connected to the B2B connector:

Scroll Title
anchorTable_SIP_B2B
titleGeneral PL I/O to B2B connectors information

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FPGA BankB2B ConnectorI/O Signal CountVoltage LevelNotes
































JTAG Interface

JTAG access to the TExxxx SoM through B2B connector JMX.

Scroll Title
anchorTable_SIP_JTG
titleJTAG pins connection

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JTAG Signal

B2B Connector

TMS
TDI
TDO
TCK


JTAG_EN


MIO Pins

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you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

MIO PinConnected toB2BNotes
MIO12...14

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

J2QSPI



Scroll Title
anchorTable_SIP_MIOs
titleMIOs pins

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MIO PinConnected toB2BNotes





































Test Points

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you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section.

Example:

Test PointSignalB2BNotes
10PWR_PL_OKJ2-120



Scroll Title
anchorTable_SIP_TPs
titleTest Points Information

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Test PointSignalConnected toNotes





































On-board Peripherals

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs


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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection


Scroll Title
anchorTable_OBP
titleOn board peripherals

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Chip/InterfaceDesignatorNotes
















Quad SPI Flash Memory

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Notes :

Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options.


Scroll Title
anchorTable_OBP_SPI
titleQuad SPI interface MIOs and pins

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
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MIO PinSchematicU?? PinNotes


























RTC

Scroll Title
anchorTable_OBP_RTC
titleI2C interface MIOs and pins

Scroll Table Layout
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cellHighlightingtrue

MIO PinSchematicU? PinNotes










Scroll Title
anchorTable_OBP_I2C_RTC
titleI2C Address for RTC

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MIO PinI2C AddressDesignatorNotes






EEPROM

Scroll Title
anchorTable_OBP_EEP
titleI2C EEPROM interface MIOs and pins

Scroll Table Layout
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MIO PinSchematicU?? PinNotes










Scroll Title
anchorTable_OBP_I2C_EEPROM
titleI2C address for EEPROM

Scroll Table Layout
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MIO PinI2C AddressDesignatorNotes





LEDs

Scroll Title
anchorTable_OBP_LED
titleOn-board LEDs

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DesignatorColorConnected toActive LevelNote
















DDR3 SDRAM

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Notes :

Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3)

The TE???? SoM has ??? GByte volatile DDR3 SDRAM IC for storing user application code and data.

  • Part number: 
  • Supply voltage:
  • Speed: 
  • NOR Flash
  • Temperature: 

Ethernet

Scroll Title
anchorTable_OBP_ETH
titleEthernet PHY to Zynq SoC connections

Scroll Table Layout
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sortEnabledfalse
cellHighlightingtrue

U?? Pin Signal NameConnected toSignal DescriptionNote







































































CAN Transceiver

Scroll Title
anchorTable_OBP_CAN
titleCAN Tranciever interface MIOs

Scroll Table Layout
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sortEnabledfalse
cellHighlightingtrue

BankSchematicU?? PinNotes

D-Tx
Driver Input

R-Rx
Reciever Output



Clock Sources

Scroll Title
anchorTable_OBP_CLK
titleOsillators

Scroll Table Layout
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cellHighlightingtrue

DesignatorDescriptionFrequencyNote


MHz


MHz


KHz





Programmable Clock Generator

There is a programmable clock generator on-board (U??) provided in order to generate variable clocks for the module. Programming can be done using I2C via PIN header J??.  The I2C Address is 0x??.

Scroll Title
anchorTable_OBP_PCLK
titleProgrammable Clock Generator Inputs and Outputs

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U?? Pin
SignalConnected toDirectionNote

IN0





IN1



IN2



IN3



XAXB





SCLK



SDA



OUT0



OUT1



OUT2



OUT3



OUT4



OUT5



OUT6



OUT7



OUT8/OUT9




Power and Power-On Sequence

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In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit


Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


Power Supply

Power supply with minimum current capability of xx A for system startup is recommended.

Power Consumption

Scroll Title
anchorTable_PWR_PC
titlePower Consumption

Scroll Table Layout
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Power Input PinTypical Current
VINTBD*


* TBD - To Be Determined

Power Distribution Dependencies

Scroll Title
anchorFigure_PWR_PD
titlePower Distribution


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Power-On Sequence

Scroll Title
anchorFigure_PWR_PS
titlePower Sequency


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Voltage Monitor Circuit

Scroll Title
anchorFigure_PWR_VMC
titleVoltage Monitor Circuit


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Power Rails

Scroll Title
anchorTable_PWR_PR
titleModule power rails.

Scroll Table Layout
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Power Rail Name

B2B Connector

JM1 Pin

B2B Connector

JM2 Pin

B2B Connector

JM3 Pin

DirectionNotes

























Bank Voltages

Scroll Title
anchorTable_PWR_BV
titleZynq SoC bank voltages.

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Bank          

Schematic Name

Voltage

Notes






























Board to Board Connectors

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  • This section is optional and only for modules.
  • use "include page" macro and link to the general B2B connector page of the module series,

    For example: 6 x 6 SoM LSHM B2B Connectors

    Include Page
    PD:6 x 6 SoM LSHM B2B Connectors
    PD:6 x 6 SoM LSHM B2B Connectors

? x ? modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.

  • 3 x REF-??????? (compatible to ????????), (?? pins, ?? per row)

    Operating Temperature: -??°C ~ ??°C
    Current Rating: ??A per ContactNumber of Positions: ??
    Number of Rows: ??

Technical Specifications

Absolute Maximum Ratings

Scroll Title
anchorTable_TS_AMR
titlePS absolute maximum ratings

Scroll Table Layout
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SymbolsDescriptionMinMaxUnit




V




V




V




V




V




V




V




V











Recommended Operating Conditions

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Scroll Title
anchorTable_TS_ROC
titleRecommended operating conditions.

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ParameterMinMaxUnitsReference Document



VSee ???? datasheets.



VSee Xilinx ???? datasheet.



VSee Xilinx ???? datasheet.



VSee Xilinx ???? datasheet.



VSee Xilinx ???? datasheet.



VSee Xilinx ???? datasheet.



VSee Xilinx ???? datasheet.



°CSee Xilinx ???? datasheet.



°CSee Xilinx ???? datasheet.


Physical Dimensions

  • Module size: ?? mm × ?? mm.  Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: ? mm.

PCB thickness: ?? mm.

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In 'Physical Dimension' section, top and bottom view of module must be inserted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part) for every SoM.

For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below:

https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV02/Documents/AD-TE0745-02-30-1I.PDF

Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .



Scroll Title
anchorFigure_TS_PD
titlePhysical Dimension


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scroll-pdftrue
scroll-officetrue
scroll-chmtrue
scroll-docbooktrue
scroll-eclipsehelptrue
scroll-epubtrue
scroll-htmltrue

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Currently Offered Variants 

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Set correct link to the shop page overview table of the product on English and German.

Example for TE0706:

    ENG Page: https://shop.trenz-electronic.de/en/search?sSearch=TE0706

    DEU Page: https://shop.trenz-electronic.de/de/search?sSearch=TE0706


Scroll Title
anchorTable_VCP_SO
titleTrenz Electronic Shop Overview

Scroll Table Layout
orientationportrait
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sortEnabledfalse
cellHighlightingtrue

Trenz shop TEXXXX overview page
English pageGerman page


Revision History

Hardware Revision History

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Set correct links to download  arrier, e.g. TE0706 REV02:

  TE0706-02  ->   https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0706/REV02/Documents

Note:

  • Date format:  YYYY-MM-DD


Scroll Title
anchorTable_RH_HRH
titleHardware Revision History

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DateRevisionChangesDocumentation Link





Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Scroll Title
anchorFigure_RV_HRN
titleBoard hardware revision number.


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Document Change History

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  • Note this list must be only updated, if the document is online on public doc!
  • It's semi automatically, so do following
    • Add new row below first

    • Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template

    • Metadata is only used of compatibility of older exports


Scroll Title
anchorTable_RH_DCH
titleDocument change history.

Scroll Table Layout
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sortEnabledfalse
cellHighlightingtrue

DateRevisionContributorDescription

Page info
infoTypeModified date
dateFormatyyyy-MM-dd
typeFlat

Page info
infoTypeCurrent version
prefixv.
typeFlat
showVersionsfalse

Page info
infoTypeModified by
typeFlat
showVersionsfalse

  • change list

--

all

Page info
infoTypeModified users
typeFlat
showVersionsfalse

  • --


Disclaimer

Include Page
IN:Legal Notices
IN:Legal Notices