- Created by Manuela Strücker, last modified on 09 09, 2022
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Overview
This guide shows the main components of the TE0802 module and introduces the first steps to get the provided reference design up and running.
This module TE00802 has a Xilinx Zynq Ultrascale+ and several hardware features onboard that allows you to create digital hardware and software designs. For communication and configuration the module board offers a JTAG/UART Interface.
Prerequisites
Hardware | Software |
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Documentation
- Official links to the shop:
- Technical Reference Manual:
- Resources & Reference Designs:
Hardware Features and Overview
TE0802-02-1AEV2-A | TE0802-02-2AEV2-A | |
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MPSoC | Xilinx Zynq UltraScale+
| Xilinx Zynq UltraScale+
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Storage |
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Display |
| |
Audio |
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Connectors |
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Communication & Debug |
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Input |
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Information on IO routing and FPGA pin connections can be found in the
Board Power-Up
Hardware Setup and Power up in QSPI-Boot mode
Preparations
- Download the source code and configuration files for "TE0802 test_board" reference design. Ensure that your download files match your Vivado version.
Check the settings from DIP-Switch S1 (JTAG):
S1.1 S1.2 S1.3 S1.4 OFF OFF OFF OFF Run _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
_create_win_setup.cmd/_create_linux_setup.sh------------------------Set design paths---------------------------- -- Run Design with: _create_win_setup -- Use Design Path: <absolute project path> -------------------------------------------------------------------- -------------------------TE Reference Design--------------------------- -------------------------------------------------------------------- -- (0) Module selection guide, project creation...prebuilt export... -- (1) Create minimum setup of CMD-Files and exit Batch -- (2) Create maximum setup of CMD-Files and exit Batch -- (3) (internal only) Dev -- (4) (internal only) Prod -- (c) Go to CMD-File Generation (Manual setup) -- (d) Go to Documentation (Web Documentation) -- (g) Install Board Files from Xilinx Board Store (beta) -- (a) Start design with unsupported Vivado Version (beta) -- (x) Exit Batch (nothing is done!) ---- Select (ex.:'0' for module selection guide):
- Press '0' and enter to start "Module Selection Guide"
- Select your assembly version
- validate selection
- press '2' and enter to "create Vivado project" and "create and open delivery binary folder"
- Depending on the preferred application, continue with chapter "Linux in QSPI-Boot mode" or "'Hello Trenz' in QSPI-Boot mode"
Linux in QSPI-Boot mode
- Connect the MicroUSB cable from your module board with your PC
- Connect peripherals to devices
- VGA, display port → monitor
- USB → keyboard
- ...
- Connect the module board with the power supply (5V)
- Power on module board
Program 'u-boot' application on QSPI flash
run on Vivado TCL (Script programs BOOT.bin on QSPI flash)TE::pr_program_flash -swapp u-boot
- Power off module board
- Copy image.ub, init.sh and boot.scr on SD card (e.g. <project folder>\test_board\_binaries_TE0802-02-2AEV2-A\boot_linux)
Switch the DIP-Switch S1 to QSPI-Boot mode
S1.1 S1.2 S1.3 S1.4 ON OFF OFF OFF - Insert the SD card into the module board
Power on the module board
In case the QSPI Flash is loaded with the reference design, you can connect to the board with a program like PuTTY. Just open up a serial session with baudrate of 115200 and the right COM port (visible in Device Manager).
Terminal exampleBoot process
Zynq Boot ROM loads FSBL from QSPI into OCM,
- FSBL init PS, programs PL using the bitstream and loads U-boot from QSPI into DDR,
- U-boot loads Linux (image.ub) from SD into DDR
- For usage instructions please refer to chapter Linux application
'Hello Trenz' in QSPI-Boot mode
- Connect the MicroUSB cable from your module board with your PC
Connect the module board with the power supply (5V)
Power on module board
Program 'hello_te0802' application on QSPI flash
run on Vivado TCL (Script programs BOOT.bin on QSPI flash)TE::pr_program_flash -swapp hello_te0802
Switch the DIP-Switch S1 to QSPI-Boot mode:
S1.1 S1.2 S1.3 S1.4 ON OFF OFF OFF Restart the module board
In case the QSPI Flash is loaded with the reference design, you can connect to the board with a program like PuTTY. Just open up a serial session with baudrate of 115200 and the right COM-port (visible in Device Manager).
Terminal example
Hardware Setup and Power up in SD-Boot mode
Linux in SD-Boot mode
- Download the source code and configuration files for "TE0802 test_board" reference design. Ensure that your download files match your Vivado version.
Run _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
_create_win_setup.cmd/_create_linux_setup.sh------------------------Set design paths---------------------------- -- Run Design with: _create_win_setup -- Use Design Path: <absolute project path> -------------------------------------------------------------------- -------------------------TE Reference Design--------------------------- -------------------------------------------------------------------- -- (0) Module selection guide, project creation...prebuilt export... -- (1) Create minimum setup of CMD-Files and exit Batch -- (2) Create maximum setup of CMD-Files and exit Batch -- (3) (internal only) Dev -- (4) (internal only) Prod -- (c) Go to CMD-File Generation (Manual setup) -- (d) Go to Documentation (Web Documentation) -- (g) Install Board Files from Xilinx Board Store (beta) -- (a) Start design with unsupported Vivado Version (beta) -- (x) Exit Batch (nothing is done!) ---- Select (ex.:'0' for module selection guide):
- Press '0' and enter to start "Module Selection Guide"
- Select your assembly version
- validate selection
- press '1' and enter to "create and open delivery binary folder"
- Connect the MicroUSB cable from your module board with your PC
- Connect peripherals to devices
- VGA, display port → monitor
- USB → keyboard
- ...
- Connect the module board with the power supply (5V)
- Copy BOOT.bin, image.ub, init.sh and boot.scr on SD card (e.g. <project folder>\test_board\_binaries_TE0802-02-2AEV2-A\boot_linux)
Switch the DIP-Switch S1 to SD-Boot mode
S1.1 S1.2 S1.3 S1.4 ON ON OFF OFF - Insert the SD card into the module board
Power on the module board
You can connect to the board with a program like PuTTY. Just open up a serial session with baudrate of 115200 and the right COM port (visible in Device Manager).
Terminal exampleBoot process
Zynq Boot ROM loads FSBL from SD into OCM,
- FSBL init PS, programs PL using the bitstream and loads U-boot from SD into DDR,
- U-boot loads Linux (image.ub) from SD into DDR
- For usage instructions please refer to chapter Linux application
Linux Application
After the Linux boot is complete, you can use the Linux shell and the connected peripherals
I2C
use linux shelli2cdetect -l (Shows a list of the available I2C buses) i2cdetect -y -r 1 (check I2C 1 Bus)
Real Time Clock (RTC)
use linux shelldmesg | grep rtc (RTC check) hwclock --test
Ethernet
use linux shelludhcpc (ETH0 check) ifconfig (shows the configuration of the network interface)
USB
use linux shelllsusb (USB check)
PCIe (M.2 SSD)
use linux shelllspci (PCIe check)
Audio
use linux shellaplay /<link to mounted sd card>/<filename>.wav (e.g. aplay /run/mount/sd/<filename>.wav)
Display Port must be connected to activate audio drivers. Use .wav or other aplay supported formate
- VGA
- connect VGA to monitor and adjust source (it shows test pattern)
- Display Port
- second linux console output will be shown on the monitor, when boot process is finished.
- connect keyboard to TE0802 USB, to interact with the second console
- petalinux login: root
- password: root
- Webserver
- insert IP on web browser to start web interface
- Startup Script
- If there is a start script named 'init.sh' on the SD card, it is loaded and executed shortly before the Linux boot process is completed.
- User bash code can be inserted on 'init.sh'
- Monitoring input clock (25MHz)
- Open Vivado HW-Manager and add VIO signal to dashboard (*.ltx located on prebuilt folder)
changed Value from 25MHz CLK to unsigned. Note: Frequency Counter is inaccurate and displayed unit is Hz
Vivado Hardware Manager
Reference Design - Introduction
We provide a reference design that interacts with most of the peripheral on the module. The provided design "TE0802 test board" shows how to connect the different parts of the module to simplify the development of your own application. You can use it for your own design but keep in mind the overall FPGA resources and power consumption before deployment.
The reference design we are introducing in this guide is "TE0802 test board". The most important steps to get it up and running are explained on TE0802 Test Board. The Download is available here.
The reference design is only usable with the specified Vivado/Vitis version. Always use the same version of Xilinx Software for one Project. (e.g. use reference design 2021.2.1 with vitis installation 2021.2.1)
The components of the reference design are illustrated in the following figure:
Figure 6: Vivado Address Editor - Address Mapping
For example the AXI GPIO IP Core which has a LED1 connected to it, can be controlled with software(C/C++) by raising the bits mapped to the address 0x4000 0000.
The VIO Core enables you to control connected IOs via the Vivado Hardware Manager(like LED2).
Notes
Document Revision History
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