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Overview

The Trenz Electronic TE0813 is an industrial grade MPSoC SOM integrating a Xilinx Zynq UltraScale+, DDR4 SDRAM with 64-Bit width data bus connection, SPI Boot Flash memory for configuration and operation, transceivers and powerful switch-mode power supplies for all on-board voltages. A large number of configurable I/Os is provided via rugged high-speed stacking connections.

All this in a compact 5.2 cm x 7.6 cm form factor, at the most competitive price.

Refer to http://trenz.org/te0813-info for the current online version of this manual and other available documentation.

Key Features

  • SoC
    • Device: ZU1 / ZU2 / ZU3 / ZU4 / ZU5 1)
    • Engine: CG / EG / EV 1)
    • Speedgrade: -1 / -2 1)
    • Temperature Range: Extended / Industrial 1)
    • Package: SFVC784
  • RAM/Storage
    • 4 GByte DDR4 SDRAM 2)
    • 2 x 64 MByte Serial Flash 3)
    • EEPROM with MAC address
  • On Board
    • Oscillator
  • Interface
    • 4 x B2B Connector (ADM6)
      • up to 204 PL IO

        • HP: 156
        • HD: 24 / 48  4)
      • up to 65 PS MIO

      • 4 GTR
      • 4 GTH (with ZU4 and higher)
      • JTAG
  • Power
    • 3 V ... 5 V power supply via B2B Connector needed.
  • Dimension
    • 76 mm x 52 mm
  • Notes
    1) Please, take care of the possible assembly options. Furthermore, check whether the power supply is powerful enough for your FPGA design.
    2) Up to 32 GByte are possible with a maximum bandwidth of 2400 MBit/s.
    3) Please, take care of the possible assembly options.
    4) Please, take care of the possible assembly options.

Block Diagram

TExxxx block diagram

Main Components

TExxxx main components
  1. SoC, U1
  2. DDR4, U2, U3, U9, U12
  3. Quad SPI Flash, U7, U17
  4. Connector, JM1, JM2, JM3, JM4
  5. EEPROM, U28
  6. Clock Generator, U5
  7. Oscillator, U6, U32
  8. Power Supply, U4, U8, U10, U11, U13 ... U16, U18 ... U24, U26, U27, U29 ...U31, U33, U34, U41

Initial Delivery State

Storage device name

Content

Notes

DDR4 SDRAMnot programmed
Quad SPI Flashnot programmed
EEPROMnot programmed besides factory programmed MAC address
Programmable Clock Generatornot programmed
Initial delivery state of programmable devices on the module

Signals, Interfaces and Pins

Connectors

Connector TypeDesignatorInterfaceIO CNT 1)Notes
B2BJM1MGT PL4 x MGT (RX/TX)
B2BJM1HP52 SE / 24 DIFF
B2BJM2MGT PS2 x MGT CLK
B2BJM2MGT PS4 x MGT (RX/TX)
B2BJM2CFGJTAG
B2BJM2CFGMODE
B2BJM3HD48 SE / 24 DIFF
B2BJM3MGT PLMGT CLK
B2BJM3MIO65 GPIO
B2BJM4HD104 SE / 48 DIFF

1) IO CNT depends on assembly variant. E.g. the MGTs are not available for all FPGAs

Board Connectors


Test Points

Test PointSignalNotes1)
TP1PLL_SCLpulled-up to PS_1V8
TP2PLL_SDApulled-up to PS_1V8
TP5GND
TP6PL_1V8
TP7GND
TP8GND
TP9PL_VCCINT_IO
TP10GND
TP11PL_VCCINT
TP12PL_VCU_0V9
TP13FP_0V85
TP14PS_1V8
TP15GND
TP16DDR_2V5
TP17DDR_PLL
TP18DDR_1V2
TP20MGTAVTT
TP21VTT
TP22PL_GT_1V05
TP23VREFA
TP24MGTVCCAUX
TP25MGTAVCC
TP27PS_PLL
TP28PS_AVTT
TP29LP_0V85
TP30PS_AUX
TP31PS_AVCC
TP34POR_Bpulled-up to PS_1V8

1) Direction:

    • IN (C2M): Carrier to Module, means it's an input from the point of view of this board
    • OUT (M2C): Module to Carrier, means it's output from the point of view of this board
Test Points Information

On-board Peripherals

Chip/InterfaceDesignatorConnected ToNotes

DDR4 SDRAM

U2, U3, U9, U12SoC - PS

Quad SPI Flash

U7, U17SoC - PSBooting.

EEPROM

U28B2B - J2

Clock Generator

U5SoC, B2B

Oscillator

U6Clock Generator25 MHz

Oscillator

U32SoC33.333333 MHz
On board peripherals

Configuration and System Control Signals

Connector+Pin

Signal Name

Direction1)Description
JM1.A45POR_OVERRIDEINOverride power-on reset delay 2).
JM2.A31ERR_OUTOUTPS error indication 2).
JM2.A34ERR_STATUSOUTPS error status 2).
JM2.A35LP_GOODOUTLow-power domain powered-up. Pulled up to 3.3VIN
JM2.A36PLL_SCLINI2C clock
JM2.A37PLL_SDAIN/OUTI2C data
JM2.A40PG_VCUOUTProgrammable logic powered-up.
JM2.A41EN_PSGTINEnable GTR transceiver power-up.
JM2.A44 / JM2.A45 /
JM2.A46 / JM2.A47
TCK / TDI / TDO / TMSSignal-dependent

JTAG configuration and debugging interface.

JTAG reference voltage: PS_1V8

JM2.B29PG_PSGTOUTGTR transceivers powered-up.
JM2.B30PROG_BIN/OUTPower-on reset 2). Pulled-up to PS_1V8.
JM2.B33SRST_BINSystem reset 2). Pulled-up to PS_1V8.
JM2.B34INIT_BIN/OUTInitialization completion indicator after POR 2). Pulled-up to PS_1V8.
JM2.B37PG_PLOUTVCU powered-up.
JM2.B38EN_FPDINEnable full-power domain power-up.
JM2,B41PG_FPDOUTFull-power domain powered-up.
JM2.B45PG_DDROUTDDR power supply powered-up.
JM2.B46DONEOUTPS done signal 2). Pulled-up to PS_1V8.
JM2.B47EN_DDRINEnable DDR power-up.
JM2.C31MRINManual reset.
JM2.C35EN_PLINEnable programable logic power-up.
JM2.C36EN_GT_RINEnable GTH/GTY transceiver power-up.
JM2.C44 / JM2.C45 / JM2.C46 / JM2.C47MODE3..0INBoot mode selection 2):
  • JTAG
  • QUAD-SPI (32 Bit)
  • SD1 (2.0)
  • eMMC (1.8 V)
  • SD1 LS (3.0)

Supported Modes depends also on used Carrier.

JM2.D33PG_GT_ROUTGTH/GTY Transceivers powered-up.
JM2.D37PSBATTINPS RTC Battery supply voltage 2) 3).
JM2.D45 / JM2.D46DX_P / DX_N-SoC temperatur sensing diode pins 2).

1) Direction:

    • IN: Input from the point of view of this board.
    • OUT: Output from the point of view of this board.

2) See UG1085 for additional information.

3) See Recommended Operating Conditions. (Fix the link!)

Controller signal.

Power and Power-On Sequence


Power Rails

Power Rail Name/ Schematic NameConnector.PinDirection1)Notes
VCCO_66JM1.A32 / JM1.A33IN
VREF_66JM1.A41IN
3.3VINJM1.A54 / JM1.A55 / JM1.B55 / JM1.B56IN

PL_1V8

JM1.C32 / JM1.C33 / JM1.D33 / JM1.D34OUT
PL_DCINJM1.C57 / JM1.C58 / JM1.C59 / JM1.C60 / JM1.D57 / JM1.D58 / JM1.D59 / JM1.D60 / IN
LP_DCDCJM2.A50 / JM2.A51 / JM2.A52 / JM2.B50 / JM2.B51 / JM2.B52 / JM2.C50 / JM2.C51 / JM2.C52 / JM2.D50 / JM2.D51 / JM2.D52IN
DCDCINJM2.A57 / JM2.A58 / JM2.A59 / JM2.A60 / JM2.B57 / JM2.B58 / JM2.B59 / JM2.B60 / JM2.C57 / JM2.C58 / JM2.C59 / JM2.C60 / JM2.D57 / JM2.D58 / JM2.D59 / JM2.D60 / IN
PS_BATTJM2.D37IN
DDR_1V2JM2.D47OUT
PS_1V8JM3.A56 / JM3.B56 / JM3.C56 / JM3.D56OUT
GT_DCDCJM3.A59 / JM3.A60 / JM3.B59 / JM3.B60 / JM3.C59 / JM3.C60 / JM3.D59 / JM3.D60 /IN
VCCO_25JM3.C7 / JM3.C8 / JM3.D8 / JM3.D9IN
VCCO_26JM3.C19 / JM3.C20 / JM3.D20 / JM3.D21IN
VCCO_64JM4.B21 / JM4.B39IN
VREF_64JM4.B30IN
VCCO_65JM4.C21 / JM4.C39IN
VREF_65JM4.C30IN

1) Direction:

    • IN: Input from the point of view of this board.
    • OUT: Output from the point of view of this board.
Module power rails.

Recommended Power up Sequencing

The power up sequencing highly depends on the use case. In general, it should be possible to enable/disable the processing system (PS) / programmable logic (PL) independently. Furthermore, within the processing logic it should be possible to enable/disable only low-power domain and/or low-power and full-power domain. Additionally, usage of GTR for PS side and GTH/GTY for PL side should be possible. Because of this flexibility the needed parts of the following table needs to be selected individually. For detailed information take a look into schematics.

SequenceNet nameRecommended Voltage RangePull-up/downDescriptionNotes
0---Configuration signal setup.See Configuration and System Control Signals. (Fix the link!)
1 1)PSBATT1.2 V ... 1.5 V-Battery connection.Battery Power Domain usage. When not used, tie to GND.
1 2)3.3VIN3.3 V (± 5 %)-Management power supply.Consider note 2) for modules with VCU and/or low-power SoC.
2Processing System (PS):



2Low-power domain:
3LP_DCDC3.3 V ... 5.0 V (± 5 %)-Low-power domain power supply.

EN_LPD-PU 3), 3.3 VLow-power domain power enable.

LP_GOOD-PU 3), 3.3 VLow-power domain power good status.

Full-power domain:

DCDCIN3.3 V ... 5.0 V (± 5 %)
Full-power domainand GTR transceiver power supply.

EN_FPD3.3 V-Full-power domain power enable.

PG_FPD-PU 3), 3.3 VFull-power domain power good status.

EN_DDR3.3 V-DDR memory power enable.

PG_DDR
PU 3), 3.3 VDDR memory power good status.

GTR Transceiver

EN_PSGT3.3 V-GTR transceiver power enable.

PG_PSGT-PU 3), 3.3 VGTR transceiver power good status.
2Programmable Logic (PL)

PL_DCIN3.3 V ... 5.0 V (± 5 %)-Programmable logic power supply.

EN_PL-PU 3), 3.3 VProgrammable logic power enable.

PG_PL-PU 3), 3.3 VProgrammable logic power good status.

PG_VCU-PU 3), 3.3 VVCU power good status.

GTH / GTY Transceiver

GT_DCDC3.3 V ... 5.0 V (± 5 %)-GTH / GTY transceiver power supply.

EN_GT_R3.3 V-GTH / GTY transceiver power enable.

PG_GT_R-PU 3), 3.3 VGTH / GTY transceiver power good status.

1) (optional)

2) (on module)

3) See DS925 for additional information.

Add note for modules with VCU/low-power devices regarding signal "EN_PL" / 3.3VIN.

Baseboard Design Hints

Board to Board Connectors

Technical Specifications

Absolute Maximum Ratings *)

Power Rail Name/ Schematic NameDescriptionMinMaxUnit




V




V




V




V




V




V




V




V




°C
PS absolute maximum ratings

*) Stresses beyond those listed under TE0813 TRM (more or less equal to TE0803 but other connectors) may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these
   or any other conditions beyond those indicated under TE0813 TRM (more or less equal to TE0803 but other connectors). Exposure to absolute-maximum rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions

This TRM is generic for all variants. Temperature range can be differ depending on the assembly version.  Voltage range is mostly the same during variants (exceptions are possible, depending on custom request)

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

  • Variants of modules are described here: Article Number Information
  • Modules with commercial temperature grade are equipped with components that cover at least the range of 0°C to 75°C
  • Modules with extended temperature grade are equipped with components that cover at least the range of 0°C to 85°C
  • Modules with industrial temperature grade are equipped with components that cover at least the range of -40°C to 85°C
  • The actual operating temperature range will depend on the FPGA / SoC design / usage and cooling and other variables.


ParameterMinMaxUnitsReference Document



VSee ???? datasheets.



VSee  ???? datasheet.



VSee  ???? datasheet.



VSee  ???? datasheet.



VSee  ???? datasheet.



VSee  ???? datasheet.



VSee  ???? datasheet.



°CSee  ???? datasheet.
Recommended operating conditions.


Physical Dimensions

  • Module size: ?? mm × ?? mm.  Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: ? mm.

PCB thickness: ?? mm.

Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Physical Dimension

Currently Offered Variants 

Trenz shop TEXXXX overview page
English pageGerman page
Trenz Electronic Shop Overview

Revision History

Hardware Revision History

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Board hardware revision number.


DateRevisionChangesDocumentation Link




Hardware Revision History

Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Document Change History

DateRevisionContributorDescription

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  • <add TRM change list here>

--

all

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  • --
Document change history.

Disclaimer

Data Privacy

Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy

Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

Limitation of Liability

In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents. If your use of the materials or information from this document results in the need for servicing, repair or correction of equipment or data, you assume all costs thereof.

Copyright Notice

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.

Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.

REACH, RoHS and WEEE

REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.


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