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The Trenz Electronic TE0813 is an industrial grade MPSoC SOM integrating a Xilinx Zynq UltraScale+, DDR4 SDRAM with 64-Bit width data bus connection, SPI Boot Flash memory for configuration and operation, transceivers and powerful switch-mode power supplies for all on-board voltages. A large number of configurable I/Os is provided via rugged high-speed stacking connections.
All this in a compact 5.2 cm x 7.6 cm form factor, at the most competitive price.
Refer to http://trenz.org/te0813-info for the current online version of this manual and other available documentation.
up to 204 PL IO
up to 65 PS MIO
Storage device name | Content | Notes |
---|---|---|
DDR4 SDRAM | not programmed | |
Quad SPI Flash | not programmed | |
EEPROM | not programmed besides factory programmed MAC address | |
Programmable Clock Generator | not programmed |
Connector Type | Designator | Interface | IO CNT 1) | Notes |
---|---|---|---|---|
B2B | JM1 | MGT PL | 4 x MGT (RX/TX) | |
B2B | JM1 | HP | 52 SE / 24 DIFF | |
B2B | JM2 | MGT PS | 2 x MGT CLK | |
B2B | JM2 | MGT PS | 4 x MGT (RX/TX) | |
B2B | JM2 | CFG | JTAG | |
B2B | JM2 | CFG | MODE | |
B2B | JM3 | HD | 48 SE / 24 DIFF | |
B2B | JM3 | MGT PL | MGT CLK | |
B2B | JM3 | MIO | 65 GPIO | |
B2B | JM4 | HD | 104 SE / 48 DIFF |
1) IO CNT depends on assembly variant. E.g. the MGTs are not available for all FPGAs
Test Point | Signal | Notes1) |
---|---|---|
TP1 | PLL_SCL | pulled-up to PS_1V8 |
TP2 | PLL_SDA | pulled-up to PS_1V8 |
TP5 | GND | |
TP6 | PL_1V8 | |
TP7 | GND | |
TP8 | GND | |
TP9 | PL_VCCINT_IO | |
TP10 | GND | |
TP11 | PL_VCCINT | |
TP12 | PL_VCU_0V9 | |
TP13 | FP_0V85 | |
TP14 | PS_1V8 | |
TP15 | GND | |
TP16 | DDR_2V5 | |
TP17 | DDR_PLL | |
TP18 | DDR_1V2 | |
TP20 | MGTAVTT | |
TP21 | VTT | |
TP22 | PL_GT_1V05 | |
TP23 | VREFA | |
TP24 | MGTVCCAUX | |
TP25 | MGTAVCC | |
TP27 | PS_PLL | |
TP28 | PS_AVTT | |
TP29 | LP_0V85 | |
TP30 | PS_AUX | |
TP31 | PS_AVCC | |
TP34 | POR_B | pulled-up to PS_1V8 |
1) Direction:
Chip/Interface | Designator | Connected To | Notes |
---|---|---|---|
DDR4 SDRAM | U2, U3, U9, U12 | SoC - PS | |
Quad SPI Flash | U7, U17 | SoC - PS | Booting. |
EEPROM | U28 | B2B - J2 | |
Clock Generator | U5 | SoC, B2B | |
Oscillator | U6 | Clock Generator | 25 MHz |
Oscillator | U32 | SoC | 33.333333 MHz |
Connector+Pin | Signal Name | Direction1) | Description |
---|---|---|---|
JM1.A45 | POR_OVERRIDE | IN | Override power-on reset delay 2). |
JM2.A31 | ERR_OUT | OUT | PS error indication 2). |
JM2.A34 | ERR_STATUS | OUT | PS error status 2). |
JM2.A35 | LP_GOOD | OUT | Low-power domain powered-up. Pulled up to 3.3VIN |
JM2.A36 | PLL_SCL | IN | I2C clock |
JM2.A37 | PLL_SDA | IN/OUT | I2C data |
JM2.A40 | PG_VCU | OUT | Programmable logic powered-up. |
JM2.A41 | EN_PSGT | IN | Enable GTR transceiver power-up. |
JM2.A44 / JM2.A45 / JM2.A46 / JM2.A47 | TCK / TDI / TDO / TMS | Signal-dependent | JTAG configuration and debugging interface. JTAG reference voltage: PS_1V8 |
JM2.B29 | PG_PSGT | OUT | GTR transceivers powered-up. |
JM2.B30 | PROG_B | IN/OUT | Power-on reset 2). Pulled-up to PS_1V8. |
JM2.B33 | SRST_B | IN | System reset 2). Pulled-up to PS_1V8. |
JM2.B34 | INIT_B | IN/OUT | Initialization completion indicator after POR 2). Pulled-up to PS_1V8. |
JM2.B37 | PG_PL | OUT | VCU powered-up. |
JM2.B38 | EN_FPD | IN | Enable full-power domain power-up. |
JM2,B41 | PG_FPD | OUT | Full-power domain powered-up. |
JM2.B45 | PG_DDR | OUT | DDR power supply powered-up. |
JM2.B46 | DONE | OUT | PS done signal 2). Pulled-up to PS_1V8. |
JM2.B47 | EN_DDR | IN | Enable DDR power-up. |
JM2.C31 | MR | IN | Manual reset. |
JM2.C35 | EN_PL | IN | Enable programable logic power-up. |
JM2.C36 | EN_GT_R | IN | Enable GTH/GTY transceiver power-up. |
JM2.C44 / JM2.C45 / JM2.C46 / JM2.C47 | MODE3..0 | IN | Boot mode selection 2):
Supported Modes depends also on used Carrier. |
JM2.D33 | PG_GT_R | OUT | GTH/GTY Transceivers powered-up. |
JM2.D37 | PSBATT | IN | PS RTC Battery supply voltage 2) 3). |
JM2.D45 / JM2.D46 | DX_P / DX_N | - | SoC temperatur sensing diode pins 2). |
1) Direction:
2) See UG1085 for additional information.
3) See Recommended Operating Conditions. (Fix the link!)
Power Rail Name/ Schematic Name | Connector.Pin | Direction1) | Notes |
---|---|---|---|
VCCO_66 | JM1.A32 / JM1.A33 | IN | |
VREF_66 | JM1.A41 | IN | |
3.3VIN | JM1.A54 / JM1.A55 / JM1.B55 / JM1.B56 | IN | |
PL_1V8 | JM1.C32 / JM1.C33 / JM1.D33 / JM1.D34 | OUT | |
PL_DCIN | JM1.C57 / JM1.C58 / JM1.C59 / JM1.C60 / JM1.D57 / JM1.D58 / JM1.D59 / JM1.D60 / | IN | |
LP_DCDC | JM2.A50 / JM2.A51 / JM2.A52 / JM2.B50 / JM2.B51 / JM2.B52 / JM2.C50 / JM2.C51 / JM2.C52 / JM2.D50 / JM2.D51 / JM2.D52 | IN | |
DCDCIN | JM2.A57 / JM2.A58 / JM2.A59 / JM2.A60 / JM2.B57 / JM2.B58 / JM2.B59 / JM2.B60 / JM2.C57 / JM2.C58 / JM2.C59 / JM2.C60 / JM2.D57 / JM2.D58 / JM2.D59 / JM2.D60 / | IN | |
PS_BATT | JM2.D37 | IN | |
DDR_1V2 | JM2.D47 | OUT | |
PS_1V8 | JM3.A56 / JM3.B56 / JM3.C56 / JM3.D56 | OUT | |
GT_DCDC | JM3.A59 / JM3.A60 / JM3.B59 / JM3.B60 / JM3.C59 / JM3.C60 / JM3.D59 / JM3.D60 / | IN | |
VCCO_25 | JM3.C7 / JM3.C8 / JM3.D8 / JM3.D9 | IN | |
VCCO_26 | JM3.C19 / JM3.C20 / JM3.D20 / JM3.D21 | IN | |
VCCO_64 | JM4.B21 / JM4.B39 | IN | |
VREF_64 | JM4.B30 | IN | |
VCCO_65 | JM4.C21 / JM4.C39 | IN | |
VREF_65 | JM4.C30 | IN |
1) Direction:
The power up sequencing highly depends on the use case. In general, it should be possible to enable/disable the processing system (PS) / programmable logic (PL) independently. Furthermore, within the processing logic it should be possible to enable/disable only low-power domain and/or low-power and full-power domain. Additionally, usage of GTR for PS side and GTH/GTY for PL side should be possible. Because of this flexibility the needed parts of the following table needs to be selected individually. For detailed information take a look into schematics.
Sequence | Net name | Recommended Voltage Range | Pull-up/down | Description | Notes |
---|---|---|---|---|---|
0 | - | - | - | Configuration signal setup. | See Configuration and System Control Signals. (Fix the link!) |
1 1) | PSBATT | 1.2 V ... 1.5 V | - | Battery connection. | Battery Power Domain usage. When not used, tie to GND. |
1 2) | 3.3VIN | 3.3 V (± 5 %) | - | Management power supply. | Consider note 2) for modules with VCU and/or low-power SoC. |
2 | Processing System (PS): | ||||
2 | Low-power domain: | ||||
3 | LP_DCDC | 3.3 V ... 5.0 V (± 5 %) | - | Low-power domain power supply. | |
EN_LPD | - | PU 3), 3.3 V | Low-power domain power enable. | ||
LP_GOOD | - | PU 3), 3.3 V | Low-power domain power good status. | ||
Full-power domain: | |||||
DCDCIN | 3.3 V ... 5.0 V (± 5 %) | Full-power domainand GTR transceiver power supply. | |||
EN_FPD | 3.3 V | - | Full-power domain power enable. | ||
PG_FPD | - | PU 3), 3.3 V | Full-power domain power good status. | ||
EN_DDR | 3.3 V | - | DDR memory power enable. | ||
PG_DDR | PU 3), 3.3 V | DDR memory power good status. | |||
GTR Transceiver | |||||
EN_PSGT | 3.3 V | - | GTR transceiver power enable. | ||
PG_PSGT | - | PU 3), 3.3 V | GTR transceiver power good status. | ||
2 | Programmable Logic (PL) | ||||
PL_DCIN | 3.3 V ... 5.0 V (± 5 %) | - | Programmable logic power supply. | ||
EN_PL | - | PU 3), 3.3 V | Programmable logic power enable. | ||
PG_PL | - | PU 3), 3.3 V | Programmable logic power good status. | ||
PG_VCU | - | PU 3), 3.3 V | VCU power good status. | ||
GTH / GTY Transceiver | |||||
GT_DCDC | 3.3 V ... 5.0 V (± 5 %) | - | GTH / GTY transceiver power supply. | ||
EN_GT_R | 3.3 V | - | GTH / GTY transceiver power enable. | ||
PG_GT_R | - | PU 3), 3.3 V | GTH / GTY transceiver power good status. |
1) (optional)
2) (on module)
3) See DS925 for additional information.
Add note for modules with VCU/low-power devices regarding signal "EN_PL" / 3.3VIN.
Power Rail Name/ Schematic Name | Description | Min | Max | Unit |
---|---|---|---|---|
V | ||||
V | ||||
V | ||||
V | ||||
V | ||||
V | ||||
V | ||||
V | ||||
°C |
*) Stresses beyond those listed under TE0813 TRM (more or less equal to TE0803 but other connectors) may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these
or any other conditions beyond those indicated under TE0813 TRM (more or less equal to TE0803 but other connectors). Exposure to absolute-maximum rated conditions for extended periods may affect device reliability.
This TRM is generic for all variants. Temperature range can be differ depending on the assembly version. Voltage range is mostly the same during variants (exceptions are possible, depending on custom request)
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
Parameter | Min | Max | Units | Reference Document |
---|---|---|---|---|
V | See ???? datasheets. | |||
V | See ???? datasheet. | |||
V | See ???? datasheet. | |||
V | See ???? datasheet. | |||
V | See ???? datasheet. | |||
V | See ???? datasheet. | |||
V | See ???? datasheet. | |||
°C | See ???? datasheet. |
Module size: ?? mm × ?? mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: ? mm.
PCB thickness: ?? mm.
Create DrawIO object here: Attention if you copy from other page, objects are only linked.
Trenz shop TEXXXX overview page | |
---|---|
English page | German page |
Create DrawIO object here: Attention if you copy from other page, objects are only linked.
Date | Revision | Changes | Documentation Link |
---|---|---|---|
Hardware revision number can be found on the PCB board together with the module model number separated by the dash.
Date | Revision | Contributor | Description |
---|---|---|---|
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Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy
The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.
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The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.
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Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).
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Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.
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Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).
Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.
Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.
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