Power Supply1

The module can be powered by B2B connector J5 or the USB connector. If both power supplies are available, the B2B connector power supply takes precedence, disabling the USB power supply automatically.

On Board Power Rails

Three on-board voltage regulators provide the following power supply rails needed by the components on the module:
1.2V, 3.0 A max
2.5V, 0.8 A max
3.3V, 3.0 A max
1.5V, 1.0 A max
Figure 3 show power supply diagram.
Figure 3: TE0630 Power diagram
The power rails are available for the FPGA and can be shared with a carrier board by the corresponding lines of the B2B connectors J4 and J5. Please note that the power consumption of the FPGA is highly dependent on the design actually loaded. So please use a tool like Xilinx Xpower to estimate the expected power consumption of your design.
Even if the provided voltages of the module are not used on the carrier board, it is recommended to bypass them to ground with 10 nF - 100 nF capacitors.
FPGA I/O banks power supply
Spartan-6 architecture organizes I/Os into four I/O banks, see Table 1 for supply voltage used for each bank.
VCCIO0 voltage can be configured in 3 ways:
2.5V - When resistor R103 is populated and resistor R102 is not populated.
3.3V - When R103 is not populated and resistor R102 is populated.
External supply - When R103 is not populated and R102 is not populated. In this case external supply source have to be connected to pins 1, 2, 3, 4 of J4 B2B connectorSee Spartan-6 documentation fo VCCIO power range..

See Figure 4 to locate R102 and R103 on PCB.
 

Figure 4: R102 and R103 location

Table 1: FPGA banks VCCIO power supply
Note that some of Spartan-6 I/O types are partially compatible, so pins of compatible types can be used as inputs for signal of other type. See "Spartan-6 FPGA SelectIO Resources" page 38 for detailed information.