model | gates | block-RAM | clock | DDR RAM | temp. |
---|---|---|---|---|---|
TE0300-01M | 1.2 | 504 | 125 | 512 | comm. |
TE0300-01BM | 1.6 | 648 | 125 | 512 | comm. |
TE0300-01BMLP | 1.6 | 648 | 100 | 512 | comm. |
TE0300-01NR | 1.2 | 504 | 125 | - | comm. |
TE0300-01I | 1.2 | 504 | 125 | 512 | ind. |
TE0300-01IBM | 1.6 | 648 | 125 | 512 | ind. |
TE0300-01IBMLP | 1.6 | 648 | 100 | 512 | ind. |
abbreviations:
FPGA options
Module can be ordered with Xilinx Spartan-3E XC3S1200E or XC3S1600E chip.
High-density plug-in Xilinx Spartan-3E module
USB 2.0 interface with high speed (480 Mbit/s) data rate
Large SPI flash for configuration and user storage accessible via USB or SPI connector
Large DDR-SDRAM
FPGA configuration is implemented via JTAG, SPI Flash or USB
3 on-board high-power, high-efficiency, switch-mode DC-DC converters (1 A for each voltage rail: 1.2 V, 2.5 V, 3.3 V)
Power supply via USB or B2B (carrier board)
Flexible expansion via high-density shockproof B2B (board-to-board) connectors
Most I/O's on the B2B connectors are routed as LVDS pairs
Evenly spread supply pins for good signal integrity
Industrial temperature grade available on request
Low-cost, versatile and ruggedized design
FPGA: Xilinx Spartan-3E XC3S1200E – XC3S1600E
USB controller: Cypress EZ-USB FX2 USB 2.0 microcontroller CY7C68013A-56LFX
Non volatile memory: 16 MBit - 64 Mbit SPI Flash for FPGA-configuration and user data
Volatile memory: 512 Mbit x 16 DDR SDRAM with up to 666 Mbyte/s
Up to 110 FPGA user I/Os
Supply voltage range: 4.0 V – 5.5 V
1 push-button
1 LED
Small size (only 40.5 mm x 47.5 mm)