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Overview
Lattice MachXO2-4000HC is a CPLD chip, that is used in TEB0912 board as a system management controller. The system controller implements power management same as power sequencing, . Rather than power management is the system controller responsible for reset generation, zynq initial configuration. System controller contains of some additional features same as debouncing the power button and displaying the power status with LEDs. The JTAG and UART interfaces are routed in the firmware of CPLD from FTDI chip to FPGA.
Feature Summary
- Power Management
- Reset Management
- JTAG Routing
- Boot Mode
- User IOs
- LED and power state display
- UART
Firmware Revision and supported PCB Revision
See Document Change History
Product Specification
Port Description
Name / opt. VHDL Name | Direction | Pin | Pullup/Down | Bank Power | Description |
---|---|---|---|---|---|
ALERT_N | in | B33 | UP | +3.3V_STB | Digital output . Interrupt or SMBus alert output of temperature sensors (TMP461AIRUNT- U43,U47,U52,U57,U4) and temperature sensor with integrated fan control (LM96163-U61) /currently_not_used |
CPLD_DEBUG0 | inout | A41 | UP | +3.3V_STB | CPLD debug pin 0 |
CPLD_DEBUG1 | inout | A2 | UP | +3.3V_STB | CPLD debug pin 1 /currently_not_used |
CPLD_DEBUG2 | inout | B1 | UP | +3.3V_STB | CPLD debug pin 2 /currently_not_used |
CPLD_DEBUG3 | inout | A3 | NONE | +3.3V_STB | CPLD debug pin 3 /currently_not_used |
CPLD_HD0 | inout | B3 | UP | +3.3V_STB | High density IOs select 0 /currently_not_used |
CPLD_HD1 | inout | B28 | UP | +3.3V_STB | High density IOs select 1 /currently_not_used |
EN_VCCINT | out | B22 | DOWN | +3.3V_STB | Enable pin for +0.85V DC-DC converter (LTM4630EY-U42A) |
EN_VTT_DDR | out | A22 | DOWN | +3.3V_STB | Enable pin for 2A Peak Sink/Source DDR Termination Regulator (TPS51206-U2, U3) |
EN+0.85V_GT_AVCC_PS/ EN_0V85_GT_AVCC_PS | out | B21 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator (TPS74801DRC-U45) |
EN+0.9V_GT_AVCC/ EN_0V9_GT_AVCC | out | B14 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +0.9V output voltage (LTM4644EY-U44) |
EN+1.0V/ EN_1V0 | out | A46 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator with +1.0V output voltage (TPS74801DRC-U13) |
EN+1.2V_DDR/ EN_1V2_DDR | out | A34 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +1.2V output voltage (LTM4644EY-U53) |
EN+1.2V_GT_AVTT/ EN_1V2_GT_AVTT | out | B16 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +1.2V output voltage (LTM4644EY-U48) |
EN+1.2V_PLL_PS/ EN_1V2_PLL_PS | out | A15 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator (TPS74801DRC-U46) |
EN+1.3V_MGT_PS/ | out | B15 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +1.37V output voltage (LTM4644EY-U44) |
EN+1.8V/ EN_1V8 | out | B13 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +1.8V output voltage (LTM4644EY-U53) |
EN+1.8V_AUX/ EN_1V8_AUX | out | A30 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U49,U50,U51) |
EN+1.8V_GT_AVTT_PS/ EN_1V8_GT_AVTT_PS | out | B20 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U54) |
EN+2.5V_DDR/ EN_2V5_DDR | out | A44 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator with +2.5V output voltage (TPS74801DRC-U55, U56) |
EN+2V_MGT_PS/ EN_2V0_GT_PS | out | A21 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +2.0V output voltage (LTM4644EY-U48) |
EN+3.3V/ EN_3V3 | out | B18 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +3.3V output voltage (LTM4644EY-U1) |
EN+5V_BIAS/ EN_5V_VBIAS | out | A17 | DOWN | +3.3V_STB | Enable pin for low dropout linear regulator with +5V output voltage (ADP7102ACPZ-U58) |
EXT_STATUS_LED_G | out | B9 | NONE | +3.3V_STB | External status LED green (J40-Pin2) /currently_not_used |
EXT_STATUS_LED_R | out | A25 | NONE | +3.3V_STB | External status LED red (J40-Pin3) /currently_not_used |
FAN_EN | out | B29 | UP | +3.3V_STB | Enables a smart high-side power switch to drive the FAN (BTS41411N-U60) |
FPGA_DONE | in | A24 | UP | +3.3V_STB | FPGA PL configuration done indicator |
FTDI_PWR_EN_N | in | A36 | UP | +3.3V_STB | Active low power enable output of FTDI chip (FT2232H56Q-U38) |
FTDI_RX | out | A35 | NONE | +3.3V_STB | UART RXD of FTDI chip (FT2232H56Q-U38) |
FTDI_TCK | in | A45 | NONE | +3.3V_STB | FTDI JTAG clock pin (FT2232H56Q-U38) |
FTDI_TDI | in | A47 | NONE | +3.3V_STB | FTDI JTAG data input pin (FT2232H56Q-U38) |
FTDI_TDO | out | A48 | NONE | +3.3V_STB | FTDI JTAG data output pin (FT2232H56Q-U38) |
FTDI_TMS | in | B34 | NONE | +3.3V_STB | FTDI JTAG mode select pin (FT2232H56Q-U38) |
FTDI_TX | in | B27 | NONE | +3.3V_STB | UART TXD of FTDI chip (FT2232H56Q-U38) |
I2C_SCL_CPLD | inout | B32 | UP | +3.3V_STB | I2C clock pin that connected to all temperature sensors and current sensor /currently_not_used |
I2C_SDA_CPLD | inout | A42 | UP | +3.3V_STB | I2C data pin that connected to all temperature sensors and current sensor /currently_not_used |
JTAGEN | in | B30 | DOWN | +3.3V_STB | JTAG enable input pin of CPLD (Dip switch S4-1) If logical low, JTAG routed to FPGA. If logical high, CPLD access. |
MIO30 / MIO30_UART0_RXD | out | A8 | NONE | +1.8V | MIO30 pin of FPGA (XCZU11EG-1FFVC1760I- U30R) |
MIO31 /MIO31_UART0_TXD | in | A9 | NONE | +1.8V | MIO31 pin of FPGA (XCZU11EG-1FFVC1760I- U30R) |
MIO32 / MIO32_UART1_TXD | in | B8 | NONE | +1.8V | MIO32 pin of FPGA (XCZU11EG-1FFVC1760I- U30R) |
MIO33 / MIO33_UART1_RXD | out | B7 | NONE | +1.8V | MIO33 pin of FPGA (XCZU11EG-1FFVC1760I- U30R) |
MR | out | A26 | UP | +3.3V_STB | Manual-reset that connected to MR pin of ultralow supply-current voltage monitor chip (TPS3106K33DBVR-U73) |
NetU68_B2 | B2 | /currently_not_used | |||
PG_VCCINT | in | B23 | UP | +3.3V_STB | Power good pin for +0.85V DC-DC converter (LTM4630EY-U42A) |
PG+0.85V_GT_AVCC_PS/ PG_0V85_GT_AVCC_PS | in | B12 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator for +0.85V output voltage (TPS74801DRC-U45) |
PG+0.9V_GT_AVCC/ PG_0V9_GT_AVCC | in | A18 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +0.9V output voltage (LTM4644EY-U44) |
PG+1.0V/ PG_1V0 | in | B35 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +1.0V output voltage (TPS74801DRC-U13) |
PG+1.2V_DDR/ PG_1V2_DDR | in | A33 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +1.2V output voltage (LTM4644EY-U53) |
PG+1.2V_GT_AVTT/ PG_1V2_GT_AVTT | in | A11 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +1.2V output voltage (LTM4644EY-U48) |
PG+1.2V_PLL_PS/ PG_1V2_PLL_PS | in | A28 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator for +1.2V output voltage (TPS74801DRC-U46) |
PG+1.3V_MGT_PS/ PG_1V3_MGT_PS | in | A20 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +0.9V output voltage (LTM4644EY-U44) |
PG+1.8V/ PG_1V8 | in | B25 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +1.8V output voltage (LTM4644EY-U53) |
PG+1.8V_AUX/ PG_1V8_AUX | in | A27 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U50) |
PG+1.8V_AUX_PS/ PG_1V8_AUX_PS | in | B10 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U51) |
PG+1.8V_GT_AUX/ PG_1V8_GT_AUX | in | A13 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U49) |
PG+1.8V_GT_AVTT_PS/ PG_1V8_GT_AVTT_PS | in | A16 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U54) |
PG+2.5V_DDR/ PG_2V5_DDR | in | A32 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +2.5V output voltage (TPS74801DRC-U55) |
PG+2.5V_PL_DDR/ PG_2V5_PL_DDR | in | A38 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +2.5V output voltage (TPS74801DRC-U56) |
PG+2V_MGT_PS/ PG_2V_MGT_PS | in | A1 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +2.0V output voltage (LTM4644EY-U48) |
PG+3.3V/ PG_3V3 | in | A23 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array with +3.3V output voltage (LTM4644EY-U1) |
PWR_BTN | in | A12 | UP | +3.3V_STB | Power button input (J40-Pin1) |
PWR_STAT_GRN | out | B24 | NONE | +3.3V_STB | Red LED for power status display ( D11-Red) |
PWR_STAT_RED | out | A31 | NONE | +3.3V_STB | Green LED for power status display (D12-Green) |
SRST_B | inout | B5 | UP | +1.8V | PS software reset (Active Low) (XCZU11EG-1FFVC1769I- U30S) |
TCK | out | A5 | NONE | +1.8V | Zynq JTAG clock pin (XCZU11EG-1FFVC1760I- U30S) |
TDI | out | B4 | NONE | +1.8V | Zynq JTAG data input pin (XCZU11EG-1FFVC1760I- U30S) |
TDO | in | A6 | NONE | +1.8V | Zynq JTAG data output pin (XCZU11EG-1FFVC1760I- U30S) |
THERM_N | in | A40 | UP | +3.3V_STB | Overtemperature termal shutdown pin of temperature sensors ( TMP461, U43,U47,U52,U57,U4) and temperature sensor with integrated fan control (LM96163-U61) /currently_not_used |
TMS | out | A7 | NONE | +1.8V | Zynq JTAG mode select pin (XCZU11EG-1FFVC1760I- U30S) |
Functional Description
JTAG
JTAG signals routed directly through the CPLD to FPGA. Access between CPLD and FPGA is be multiplexed via JTAGEN pin of CPLD (B30) (logical one for CPLD, logical zero for FPGA).
CPLD JTAGEN (Dip switch S4-1) | Description |
---|---|
0 | FPGA access |
1 | CPLD access |
Boot Mode
TEB0912 supports JTAG, QSPI and SD card boot modes. Boot mode depends on the logic state of S2 dip switch pins that are connected with FPGA boot mode configuration pins.
S2-4 | S2-3 | S2-2 | S2-1 | Boot Mode |
---|---|---|---|---|
OFF | OFF | OFF | OFF | PS JTAG |
OFF | OFF | OFF | ON | QSPI |
OFF | OFF | ON | ON | SD1 (2.0) |
ON | ON | ON | OFF | SD1 LS (3.0) |
Power
In this board the CPLD is responsible for controlling and monitoring of power supply of the board. There are various DC-DC converter or regulators. To control every converter chip or regualtor the CPLD monitors power good outputs of regulators or DC-DC converters continuously to avoid over-voltage in the power system.
Enable Signal | Power Good Signal | Domain | Schematic Page | Input power Net | Regulator/ DC-DC Converter | Output power Net |
---|---|---|---|---|---|---|
EN+1.0V | PG+1.0V | PCIe_Switch_PWR | +1.37V | TPS74801DRC | +1.0V | |
EN+2.5V_DDR | PG+2.5V_DDR PG+2.5V_PL_DDR | POWER3 POWER3 | +3.3V +3.3V | TPS74801DRC TPS74801DRC | +2.5V_DDR +2.5V_PL_DDR | |
EN+1.8V | PG+1.8V | POWER3 | +12V | LMT4644EY | +1.8V | |
EN+1.2V_DDR | PG+1.2V_DDR | POWER3 | +12V | LMT4644EY | +1.2V_DDR | |
EN+1.8V_AUX | PG+1.8V_AUX | POWER2 POWER2 POWER2 | +2V_MGT_PS +2V_MGT_PS +2V_MGT_PS | TPS74801DRC TPS74801DRC TPS74801DRC | +1.8V_AUX +1.8V_GT_AUX +1.8V_AUX_PS | |
EN+1.2V_PLL_PS | PG+1.2V_PLL_PS | POWER1 | +1.37V | TPS74801DRC | +1.2V_PLL_PS | |
EN+0.85V_GT_AVCC_PS | PG+0.85V_GT_AVCC_PS | POWER1 | +1.37V | TPS74801DRC | +0.85V_GT_AVCC_PS | |
EN+1.8V_GT_AVTT_PS | PG+1.8V_GT_AVTT_PS | POWER3 | +2V_MGT_PS | TPS74801DRC | +1.8V_GT_AVTT_PS | |
EN+1.2V_GT_AVTT | PG+1.2V_GT_AVTT | POWER2 | +12V | LTM4644EY | +1.2V_GT_AVTT | |
EN+5V_BIAS | -- | POWER6 | +12V | ADP7102ACPZ-5.0-R7 | +5V_BIAS | |
EN+0.9V_GT_AVCC | PG+0.9V_GT_AVCC | POWER1 | +12V | LTM4644EY | +0.9V_GT_AVCC | |
EN+1.3V_MGT_PS | PG+1.3V_MGT_PS | POWER1 | +12V | LTM4644EY | +1.37V | |
EN+2V_MGT_PS | PG+2V_MGT_PS | POWER2 | +12V | LTM4644EY | +2V_MGT_PS | |
EN_VTT_DDR | --- | POWER4 | +3.3V +3.3V | TPS51206DSQ TPS51206DSQ | VTT_DDR_PL VTT_DDR_PS | |
EN+3.3V | PG+3.3V | POWER4 | +12V | LTM4644EY | +3.3V | |
EN_VCCINT | PG_VCCINT | POWER0 | +12V | LTM4630EY | +0.85V_VCCINT |
LED
Green LED
State | Blink sequence | Comment |
---|---|---|
IDLE | OFF | Power sequencing can not be started. Power button is not be pushed or is not be pushed correctly. |
STAGE1 | ooooooo* | Power good signal PG_VCCINT is inactive. |
STAGE2 | oooooo** | The following power good signals are inactive. The error may be due to a problem in a corresponding DC-DC converter or regulator. PG_0V9_GT_AVCC PG_1V3_MGT_PS PG_0V85_GT_AVCC_PS PG_1V2_PLL_PS |
STAGE3 | ooooo*** | The following power good signals are inactive. The error may be due to a problem in a corresponding DC-DC converter or regulator. |
STAGE4 | oooo**** | Power good signal PG_1V2_GT_AVTT is inactive. |
STAGE5 | ooo***** | The following power good signals are inactive. The error may be due to a problem in a corresponding DC-DC converter or regulator. PG_1V8 PG_3V3 PG_2V5_DDR PG_2V5_PL_DDR PG_1V2_DDR PG_1V0 |
WAIT_RDY | ******** | The state machine remains in this stage as soon as a counter is not be overflowed. After overflowing the counter the state machine will jump in the next stage. |
RDY | ON | Power is ok and the FPGA is configured successfully. |
RED LED
Status | Blink sequence | Comment |
---|---|---|
pg_all = '0' | ******** | One of the power signals are inactive. |
MR = '0' | *****ooo | Reset button is pushed. |
SRST_B ='0' | ****oooo | PS software reset (Active Low) is activated. |
FPGA_DONE ='0' | ***ooooo | FPGA PL is configured. |
FPGA_DONE ='0' | **oooooo | FPGA PL is configured. |
FTDI_PWR_EN_N='1' | *ooooooo | FTDI chip USB SUSPEND mode or device has not been configured. |
else | OFF |
Appx. A: Change History and Legal Notices
Revision Changes
Document Change History
To get content of older revision got to "Change History" of this page and select older document revision number.
Date | Document Revision | CPLD Firmware Revision | Supported PCB Revision | Authors | Description |
---|---|---|---|---|---|
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Legal Notices
Data Privacy
Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy
Document Warranty
The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.
Limitation of Liability
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Copyright Notice
No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.
Technology Licenses
The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.
Environmental Protection
To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.
REACH, RoHS and WEEE
REACH
Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).
RoHS
Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.
WEEE
Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).
Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.
Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.
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