| Company | Trenz Electronic GmbH |
|---|---|
| PCN Number | PCN-20230327 |
| Title | TE0745-02 to TE0745-03 Hardware Revision Change |
| Subject | Hardware Revision Change |
| Issue Date | 2023-05-01 |
Products Affected
This change affects all Trenz Electronic TE0745 SoMs: TE0745-02*.
Affected Product | Changes | Replacement |
|---|---|---|
| TE0745-02-71I31-A | TE0745-03-71I31-A | |
| TE0745-02-72I31-A | TE0745-03-72I31-A | |
| TE0745-02-81C31-A | TE0745-03-81C31-A | |
| TE0745-02-91C31-A | TE0745-03-91C31-A | |
| TE0745-02-92I31-A | TE0745-03-92I31-A | |
| TE0745-02-93E31-A | TE0745-03-93E31-A | |
| TE0745-02-71I31-AK | TE0745-03-71I31-AK | |
| TE0745-02-73E31-A | TE0745-03-73E31-A | |
| TE0745-02-81C31-AK | TE0745-03-81C31-AK | |
| TE0745-02-92I31-AK | TE0745-03-92I31-AK | |
| TE0745-02-82I31-A | TE0745-03-82I31-A | |
| TE0745-02-71I31-AZ | TE0745-03-71I31-A | |
| TE0745-02-72I31-AZ | TE0745-03-72I31-A | |
| TE0745-02-81C31-AZ | TE0745-03-81C31-A | |
| TE0745-02-91C31-AZ | TE0745-03-91C31-A | |
| TE0745-02-92I31-AZ | TE0745-03-92I31-A | |
| TE0745-02-93E31-AZ | TE0745-03-93E31-A | |
| TE0745-02-92I31-B | TE0745-03-92I31-A |
Ask regarding AZ variants again.
Changes
#1 Changed DCDC MUN3CAD03-SE (U10, U13, U15, U19, U30, U31) to TPS82085SIL and adapted voltage divider resistors.
Type: BOM Change
Reason: TPS82085SIL availability.
Impact: Minor changes in electrical characteristics.
#1 Remove serial number S/N. Connected CPLD (U2) pin 20 to net "BOOTMODE".
Type: Schematic Change
Reason: EOL of Component.
Impact: None. Custom system controller firmware needs to be adapted if system controller (U2) pin 20 is used inside the firmware because functionality changes.
Added assembly option to connect U4 to I2C bus via R91/R101 ( I2C address 0x61).
#2 Changed DCDC EN63A0QI (U4) to MP8869SGL-Z and adapted power circuit.
Type: Schematic Change
Reason: EOL of Component.
Impact: None. Minor changes in electrical characteristics.
#3 Added assembly option (Default: not fitted) to connect DCDC (U4) to I2C bus via resistors (R91 and R101) with I2C address 0x61.
Type: BOM change
Reason: Optional MP8869SGL-Z monitoring.
Impact: None. Consider I2C address conflicts before connecting DCDC (U4) to I2C bus.
#1 Increased voltage rating from 6.3 V to 25 V for capacitors C108, C142, C147, C148, and C109.
Type: BOM change
Reason: Functionality change for capacitor C108.
Impact: None.
Added diode D3 between signal "RST_IN_N" and "PS_1.8V".
#1 Added diode D3 between signal "RST_IN_N" and "PS_1.8V" to protect manual reset input signal.
Type: Schematic Change
Reason: Reset input signal protection.
Impact: None.
Added resistor R106 between CPLD U2 pin 25 and signal "RST_IN_N".
#1 Added series resistor R106 between CPLD (U2) pin 25 and signal "RST_IN_N".
Type: Schematic Change
Reason: Current limitation between different voltage regions.
Impact: None.
#1 Added option for diode D4 population between signal "INIT" and "PROG_B".
Type: Schematic Change
Reason: Keep FPGA in reset while signal "PROG_B" is low during initial power-up if necessary.
Impact: None.
#1 Changed clock (U33) from SiT8008AI-73-XXS-52.000000E to SiT8008BI-73-XXS-52.000000E.
Type: Schematic Change
Reason: Use newer clock revision.
Impact: None.
#1 Added testpoints (TP1...43).
Type: Schematic Change
Reason: Voltage supervision improvement.
Impact: None.
#1 Added voltage detector BD39040MUF-CE2 (U22) and connected output to signal "PWR_PL_OK".
Type: Schematic Change
Reason: Power management improvement.
Impact: None.
#1 Added voltage detector BD39040MUF-CE2 (U20) and connected output to signal "PWR_PS_OK".
Type: Schematic Change
Reason: Power management improvement.
Impact: None. Refer to next change #???.
#1 Added resistor R103 to optionally connect DCDC (U31) PG to signal "PWR_PS_OK" or use the voltage monitor U20. (ED: Bessere Formulierung!)
Type:
Reason:
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#1 Added pull-up resistor R73 for net "PWR_PL_OK".
Type: Schematic Change
Reason: Use pull-up resistor on SoM.
Impact: None.
#1 Changed supply voltage for VCCPLL from PL_1.8V to PS_1.8V.
Type: Schematic Change
Reason: Use Xilinx recommended power supply.
Impact: None.
#1 Tied DXP/DXN (U1 pins R14 and R13) directly to GND.
Type: Schematic Change
Reason: Use Xilinx recommendation for not used DXP/DXN usage.
Impact: None.
#1 Added soft start capacitor C62 option for TPS74401RGW (U8).
Type: Schematic Change
Reason: Added larger startup time option for DCDC U8.
Impact: None. For assembled capacitor larger startup times are possible.
#1 Added soft start capacitor C78 option for TPS74401RGW (U11).
Type: Schematic Change
Reason: Added larger startup time option for DCDC U11.
Impact: None. For assembled capacitor larger startup times are possible.
#1 Added decoupling capacitors C126, C127, C128, C129, C130, C131, C144, C150, C151, C152, C153, C154, C155, C156, C157.
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Method of Identification
Production Shipment Schedule
From XXXXX, after old stock is gone. If the new revision is not suitable for your application and still the former revision of the board is needed, please contact us.
Contact Information
If you have any questions related to this PCN, please contact Trenz Electronics Technical Support at
- forum.trenz-electronic.de
- wiki.trenz-electronic.de
- support%trenz-electronic.de (subject = PCN-JJJJMMDD)
phone
national calls: 05741 3200-0
international calls: 0049 5741 3200-0
Disclaimer
Any projected dates in this PCN are based on the most current product information at the time this PCN is being issued, but they may change due to unforeseen circumstances. For the latest schedule and any other information, please contact your local Trenz Electronic sales office, technical support or local distributor.
This PCN follows JEDEC Standard J-STD-046.
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