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Overview

The Trenz Electronic TE0950-02 is a powerful adaptive SoC evaluation board, equipped with an AMD Versal™ AI Edge VE2302 device. Furthermore, the board is equipped with up to 8GB DDR4 SDRAM, 128 MByte SPI Flash and an  eMMC for configuration and data storage as well as powerful switching power supplies for all required voltages. Inputs and outputs are provided by robust, flexible and cost-effective high-speed connectors.

Refer to http://trenz.org/te0950-info for the current online version of this manual and other available documentation.

Key Features

  • SoC
    • AMD Versal™ AI Edge XCVE2302-1LSESFVA784 device (engineering sample) 1)
      • Package: A784
      • Device:  VE2002, VE2102, VE2202, VE2302, VM1102 1)
      • Speed: -1, -2, -3 1)
      • Temperature: I, E 1)
  • RAM/Storage
    • DDR4 SDRAM*
      • Data width: 64bit
      • Size: def. 4GB, up to 8 GByte possible 1)
      • Speed: up to 3200Mb/s 2)
    • 128 MByte SPI Flash (primary boot option)
      • Data width: 8bit
      • size: def. 128MB, up to 512MB possible 1)
    • MicroSD card (primary boot option)
    • e.MMC (secondary boot option) 1)
      • Data width: 8bit
      • size: def. 32GB 1)
    • EEPROM with MAC-address
  • On Board
    • AMD Artix™ 7 FPGA as configurable Levelshifter/MUX for FMC and other 3.3 V IOs
      • 32 MByte SPI Flash
      • 1 dip switch
      • 2 LEDs
    • USB 2.0 Host/Device/OTG (type Micro A/B connector)
    • USB JTAG + UART Micro-USB B
    • Gigabit Ethernet RJ45
    • Output
      • 2 LEDs (1 x MIO, 1 x PL)
    • Input
      • 1 push button
      • 3 dip switches (2 x MIO, 1 x PL)
      • Reset button
  • Interface
    • zQSFP
      • 4 GTYP Transceiver
    • 2 x CRUVI HS
      • each optimized for 4 Lane MIPI, one with reduced pinout
    • 2 x CRUVI LS
    • CSI-2 connector
      • optimized for camera, 2 lane MIPI
    • FMC
      • 4 GTYP Transceiver
      • 34 LA diff pairs to Levelshifter/MUX
  • Power
    • 12 V plug
  • Dimension
    • 150 mm x 120 mm
  • Notes
    • 1) depends on assembly version
    • 2) depends on used DDR4

Block Diagram


TE0950 block diagram

Main Components

TE0950 main components
  1. SoC (Versal) U1
  2. DDR4 U8, U9, U10, U11
  3. eMMC U25
  4. dual QSPI Configuration Flash (Versal) U23, U24
  5. ETH Phy U32
  6. MAC EEPROM U35
  7. USB 2.0 Phy U27
  8. Jumper (USB Device/Host/OTG) J5
  9. Artix FPGA (Levelshifter/MUX for FMC IOs) U13
  10. OSPI Configuration Flash (Artix) U14
  11. FTDI JTAG/UART to USB Bridge U15
  12. FTDI Configuration EEPROM U17
  13. zQSFP U12/J1
  14. LPC FM J3
  15. CRUVI HS J10, J11
  16. CRUVI LS J12, J13
  17. CSI CAM Connector J15
  18. SD-CARD Slot J4
  19. RJ45 ETH jack J9
  20. micro USB A/B Connector J8
  21. micro USB B Connector (JTAG/UART) J2
  22. 4 Pin FAN Connector J17
  23. Power Input Jack
  24. Reset Push Button S3
  25. User Push Button S1
  26. Dip Switches (JTAG Selection, User) S4
  27. Dip Switches (Bootmode, User) S2
  28. Dip Switches (FMC VADJ Selection, User) S5
  29. LEDs (Power) D8, D9, D10
  30. LEDs (Status/User) D0, D1, D2, D3 D4, D6, D11

Initial Delivery State

Storage device name

Content

Notes

DDR4 SDRAMnot programmed


eMMCnot programmed


dual Quad SPI Flash (Versal)

not programmed


MAC EEPROMnot programmed besides factory programmed MAC address


FTDI EEPROMFTDI configuration for JTAG/UART with AMD Vivado compatible license
Quad SPI Flash (Artix)Template Design with basic functionality (TBD)Design has to be adapted to use case.
Initial delivery state of programmable devices on the module

Signals, Interfaces and Pins

Connectors

Connector TypeDesignatorInterfaceIO CNTNotes
B2B J3LPC FMC

4x MGT Transeiver
34 DIFF / 68 SE


FMC LA pins from/to Artix. Artix FPGA has to be configured for use case.

B2BJ11CRUVI HS

12 DIFF / 24 SE
4 SE
8 SE

Full pinout, MIPI 4 Lanes optimized (XPIO)
(XPIO)
connected to Artix @3.3V
B2BJ10CRUVI HS

9 DIFF / 18 SE
2 SE
8 SE

Reduced pinout, MIPI 4 Lanes optimized (XPIO)

(XPIO)
connected to Artix @3.3V

B2BJ12CRUVI LS 8 SEHD bank 302 @3.3V
B2BJ13CRUVI LS 8 SEHD bank 302 @3.3V
CONJ1, U12zQSFP 4x MGT Transeiver
CONJ15CSI-2 CAM3 DIFF / 6 SE
4 SE
MIPI 2Lanes (XPIO),
(I2C and GPIO) to HD Bank 302 @3.3V
CONJ9GB ETH4 DIFFLPD
CONJ8micro USB2.0 A/B 1 DIFFHost/Device/OTG check J5 for HW configuration
CONJ2micro USB2.0 B1 DIFFJTAG/UART via FTDI
CONJ4micro SD 2.01 DIFFprimary boot option, routed via levelshifter U26
CONJ174 pin FAN 2 SEFor SoC FAN with Tacho and PWM signals connected to Artix.
Board Connectors


Test Points

Test PointSignalNotes1)

TP32

GNDGND

TP29

12V12V
TP175V05V
TP163V33.3V
TP43, TP44GTYP_AVCC0.92V
TP46, TP47GTYP_AVTT1.2V
TP45GTYP_AVCC_AUX1.5V
TP48A_3V33.3V
TP191V01.0V
TP423V3_FMC3.3V
TP40FMC_VADJ

1.2V, S5A-C: OFF,OFF, OFF
1.8V, S5A-C: ON,OFF, OFF
2.5V, S5A-C: ON,ON, OFF
3.3V, S5A-C: ON,ON, ON

TP181V81.8V
TP39V_VCCAUX1.5V
TP41C_VADJ1.2V
TP35DDR_1V21.2V
TP33DDR_2V52.5V
TP36DDR_VTT0.6V

TP37

VREFA0.6V
TP38V_VCC_SOC0.8V May depend on assembly versions
TP34V_VCC_CORE0.7V May depend on assembly versions
TP1V_VCC_BATTInput for VCC_BAT supply when R21 removed. Default (R21 assembled) GND.
TP2V_FUSEInput for V_FUSE supply when R43 removed. Default (R43 assembled) GND.
TP3DDR4-TEN_0pulled-down to GND
TP4DDR4-TEN1pulled-down to GND
TP5DDR4-TEN2pulled-down to GND
TP6DDR4-TEN3pulled-down to GND
TP20PHY_LED2Function dependent on ETH PHY (U31) configuration.
TP21I2C_PMC_SCL@1.8V
TP23I2C_PMC_SDA@1.8V
TP22DCDC_5V0_SCL@3.3V Levelshifted I2C_PMC_SCL signal
TP24DCDC_5V0_SDA@3.3V Levelshifted I2C_PMC_SDA signal
TP25I2C1_SCL@1.8V
TP26I2C1_SDA@1.8V
TP27I2C_SYSMON_SCL@1.8V
TP28I2C_SYSMON_SDA@1.8V
TP7TCKJTAG TCK (Versal and Artix)
TP12TMSJTAG TCK (Versal and Artix)
TP10V_TDOJTAG TDO
TP8FTDI_TDI
TP9A_TDIJTAG TDI Artix, connected to FTDI_TDI  via DIP S4A
TP11V_TDIJTAG TDI Versal, connected to FTDI_TDI  via DIP S4B
TP13A_TDOJTAG TDO Versal, connected to VTDI  via DIP S4C
TP14F_UART_TX@3.3V, from Versal, levelshifted UART1_TX signal, to FTDI
TP15F_UART_RX@3.3V, from FTDI, levelshifted UART1_RX signal to Versal
TP31-Sense input of reset chip U38, connected to PG_GTYP_AVTT @3.3V via R203
TP30FAULTn_12V@12V, Fault signal of input protection U37

1) Direction:

    • IN: Input from the point of view of this board.
    • OUT: Output from the point of view of this board.
Test Points Information

On-board Peripherals

Chip/InterfaceDesignatorConnected ToNotes
Versal SoC: XCVE2302-1LSESFVA784-ES9780U1

-

Engineering Sample

DDR4: K48G165WC-BITDTCVU8, U9, U10, U11Versal XPIO


dual parallel QSPI: MT25QU512ABB8E12U23, U24Versal PMC/MIO

primary boot option

GB ETH PHY: 88E1512-A0-NNP2I000 U31Versal MIO
USB PHY: USB3320-EZKU27Versal MIOUSB2.0
CLK 2x 200Mhz U4, U5Versal XPIODDR4 controller, User
CLK 2x (156.25MHz, 125MHz)U6, U7Versal GTYP REFCLKFor QSFP MGTs.
eMMCU25Versal PMC/MIO

secondary boot option

eeprom 24AA025E48T U34
for MAC. I2C PS, Address 50H
User Dip 3x S2C, S2D
S4D

Versal MIO
Versal HD


User LED 2x  D0
D1

Versal MIO
Versal HD

both green
Push ButtonS1Versal HD
Artix: XC7A35T-2CSG324CU13
  • Versal XPIO
    (14 DIFF / 28 SE)
  • FMC LA pins
Configurable levelshifter for FMC and other 3.3V periphery configuration signals
QSPI Artix: S25FL256SAGBH20 U14Artix32MB
User LED 2x D2, D3ArtixD2 green, D3 red
User Dip S5DArtix
On board peripherals

Configuration and System Control Signals

Connector+Pin

Signal Name

Direction1)Description




1) Direction:

    • IN: Input from the point of view of this board.
    • OUT: Output from the point of view of this board.
Controller signal.

Power and Power-On Sequence


Power Rails

Power Rail Name/ Schematic NameConnector + PinDirection1)Notes
















1) Direction:

    • IN: Input from the point of view of this board.
    • OUT: Output from the point of view of this board.
Module power rails.

Recommended Power up Sequencing


SequenceNet nameRecommended Voltage RangePull-up/downDescriptionNotes
















































Baseboard Design Hints

Board to Board Connectors

Technical Specifications

Absolute Maximum Ratings *)

Power Rail Name/ Schematic NameDescriptionMinMaxUnit




V




V




V




V




V




V




V




V




°C
Absolute maximum ratings

*) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these
   or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions

This TRM is generic for all variants. Temperature range can be differ depending on the assembly version.  Voltage range is mostly the same during variants (exceptions are possible, depending on custom request)

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

  • Variants of modules are described here: Article Number Information
  • Modules with commercial temperature grade are equipped with components that cover at least the range of 0°C to 75°C
  • Modules with extended temperature grade are equipped with components that cover at least the range of 0°C to 85°C
  • Modules with industrial temperature grade are equipped with components that cover at least the range of -40°C to 85°C
  • The actual operating temperature range will depend on the FPGA / SoC design / usage and cooling and other variables.


ParameterMinMaxUnitsReference Document



VSee ???? datasheets.



VSee  ???? datasheet.



VSee  ???? datasheet.



VSee  ???? datasheet.



VSee  ???? datasheet.



VSee  ???? datasheet.



VSee  ???? datasheet.



°CSee  ???? datasheet.
Recommended operating conditions.


Physical Dimensions

  • Module size: ?? mm × ?? mm.  Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: ? mm.

PCB thickness: ?? mm.

Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Physical Dimension

Currently Offered Variants 

Trenz shop TEXXXX overview page
English pageGerman page
Trenz Electronic Shop Overview

Revision History

Hardware Revision History

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Board hardware revision number.


DateRevisionChangesDocumentation Link




Hardware Revision History

Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Document Change History

DateRevisionContributorDescription

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  • <add TRM change list here>

--

all

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  • --
Document change history.

Disclaimer

Data Privacy

Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy

Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

Limitation of Liability

In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents. If your use of the materials or information from this document results in the need for servicing, repair or correction of equipment or data, you assume all costs thereof.

Copyright Notice

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.

Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.

REACH, RoHS and WEEE

REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.


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