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FPGA's and SoC can be used for many more advanced functions as making a LED to blink. However "LED Blinky" is considered a "Hello World" for systems that can not otherwise say Hello.

Requirements

To make LED to Blink (under user control) following requirements are needed:

  1. Some Programmable Device: MCU, CPU, CPLD, FPGA, SoC
  2. Working Programming or Configuration interface or means to boot the Programmable Device
  3. Timing Source (Clock), can be external or internal, must be be enabled
  4. Active Power to all required power domains of the Programmable Device
  5. Release of main Reset
  6. LED Connected to some user controllable I/O Port of the Programmable Device
  7. LED must be assembled with right polarity and proper current limiting resistor
  8. Valid I/O Voltage applied to the I/O Bank with the user LED

If any of those requirements are missing, you will most likely fail with the simple task to get an LED to Blink.

 

Programmable Device

 

Timing Source

 

 

Valid I/O Voltage

It is very common that modern Integrated Circuits have separate power supply pins for I/O Voltage. That voltage if applied control the output levels from the device, if the Voltage is too low or missing then it is not possible to have enough current from the device I/O Pin to make a LED Lit.

FPGA and SoC SoM's can have fixed and user controlled Voltages for the I/O Banks. It is important to assure that the I/O Bank that controls the LED has a valid Supply Voltage applied.

If you are not sure about the I/O Banks Voltage supplies then there are some options to try.

DONE LED

If there is on board LED directly connected to FPGA "DONE" output, then it is also possible to control it as long as it is possible to configure the FPGA (or PL portion of Zynq). For Zynq the PS subsystem is not needed if configuration is done via JTAG.

MIO LED

If there is a LED directly connected to lower MIO Bank of the Zynq then this LED is also always controllable, as this Bank has to be powered for the device to boot. This LED can also be controlled if the PL portion of the Zynq is not configured or even un-powered.

VIO LED

 

 

LED's on TE SoM's and Baseboards

 MIO LEDDONE LEDUser LED PLNotes
TE0710-   
TE0711-   
TE0712-No*Yes*LED's are routed to PL I/O by System Control CPLD
TE0714-NoYesOne fixed LED on PL,1.8V or 3.3V I/O Voltage always present
TE0720MIO7Yes, FixedYes*System control CPLD can remap the LED functions during FSBL
TE0725-YesYesLED's power always available

 

 

Base User LED's Notes
TE0701   
TE07032* User supplied I/O Voltage
    

 

 

 

 

 

 

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