TE0723 TRM

Overview

The Trenz Electronic TE0723 is a Arduino compatible FPGA module based on the Xilinx Zynq XC7Z010 SoC.

Key Features

• Xilinx Zynq XC7Z010 SoC
• Dual ARM Cortex A9
• 512 MByte DDR3L SDRAM
• 16 MByte quad SPI Flash memory
• Hi-speed USB2.0 ULPI transceiver
• 23 FPGA I/O's available on board-to-board connectors
• Micro SD Card socket with card detect signal
• Micro USB OTG
• On-board USB JTAG and UART
• RGB LED (connected to PL I/O)
• "Done" LED (inverted polarity)
• CERN Open Hardware Licence 1.2

Additional assembly options are available for cost or performance optimization upon request.

Block Diagram

Figure 1: TE0723 block diagram.

Main Components

Figure 2: Main components of the TE0723 module.

1. Xilinx Zynq XC7Z010 SoC, U1
2. 4 Gbit DDR3L 256M x 16 SDRAM, U2
3. 16 MByte QSPI Flash memory, U5

4. High-speed CMOS logic analog multiplexer/demultiplexer, U10

5. 1 MHz low-power operational amplifier, U11
6. Dual high-speed USB to multipurpose UART/FIFO, U3
7. 0.5A dual-channel current-limited power switch, U21
8. Low-power programmable oscillator @ 12.000000 MHz, U7
9. 2 Kbit Microwire compatible serial EEPROM, U6
10. 10-pin header, J1
11. 8-pin header, J2
12. 10-pin header, J3
13. Analog input header, J4
14. 2 x 4-pin header, J5
15. PMod 2x6 interface header, J6
16. USB host mode jumper, J7
17. Micro USB 2.0 Type-B receptacle, J8
18. Micro USB 2.0 Type-B receptacle, J9
19. Micro SD card connector with detect signal, J10
20. Analog input select jumper, J11
21. 5V supply power input, J12
22. Reset switch, S1
23. Red LED, D2
24. Green LED, D6
25. Green LED, D7
26. Ultra-low supply-current voltage monitor, U23

27. 1A PowerSoC DC-DC converter (3.3 V), U20

28. 1A PowerSoC DC-DC converter (1.8 V, U19
29. 1A PowerSoC DC-DC converter (1.35 V), U16
30. Hi-speed USB 2.0 ULPI transceiver, U18
31. Low-power programmable oscillator @ 52.000000 MHz, U14
32. 1A PowerSoC DC-DC converter (1.0 V), U17
33. JTAG interface testpoints, TP1-TP4

Initial Delivery State

Table 1: Initial delivery state of programmable devices on the module.

Boot Process

...

Signals, Interfaces and Pins

I/O Signals

List of I/O signals between PS/PL banks and external connectors:

Table x: .

JTAG Interface

JTAG access to the Xilinx Zynq XC7Z010 SoC is provided through testpoints TP1-T4.

Table 5: JTAG interface signals.

Default PS MIO Mapping

I2C Interface

I²C interface pins from the Zynq SoC PL bank 34 are connected to the connector J1. There are no on-board I2C slave devices.

Table x: .

On-board Peripherals

DDR Memory

TE0723 module has up to 512-MBytes of DDR3L SDRAM arranged into 32-bit wide memory bus providing total of 1 GBytes of on-board RAM. Different memory sizes are available optionally.

Quad SPI Flash Memory

On-board quad SPI Flash memory S25FL127S (U5) is used to store initial FPGA configuration. Besides FPGA configuration, remaining free flash memory can be used for user application storage. All four SPI data lines are connected to the Zynq SoC's PS, allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the bus width and clock frequency used.

Dual High-speed USB to Multipurpose UART/FIFO

FT2232H...

High-speed USB ULPI PHY

Hi-speed USB ULPI PHY (U18) is provided with USB3320 from Microchip. The ULPI interface is connected to the Zynq SoC's PS USB0 via MIO28..39, bank 501 (see also section). The I/O voltage is fixed at 3.3V and PHY reference clock input is supplied from the on-board 52.000000 MHz oscillator (U14).

High-Speed Analog Multiplexer

Digitally controlled analog switch TI CD74HC4051...

Low-power Operational Amplifier

The Microchip Technology Inc. MCP6001...

Oscillators

The module has following reference clock signals provided by on-board oscillators:

Table x: Reference clock signals.

On-board LEDs

There are three LEDs on-board TE0723:

Table x: On-board LEDs.

Power and Power-On Sequence

Power Supply

Single 5V power supply with minimum current capability of 2A for system startup is recommended.

Power Consumption

TBD - To Be Determined.

Power-On Sequence

There is no specific power-on sequence, system will power-up itself if 5V is present either from J8, J9 or J12.

Variants Currently in Production

Table 8: Module variants.

Technical Specifications

Absolute Maximum Ratings

Table x: .

Recommended Operating Conditions

Table x: .

Physical Dimensions

• Module size: 68.58 mm × 53.34 mm.  Please download the assembly diagram for exact numbers.

• PCB thickness: 1.6 mm.

• Highest part on PCB: approx. 4 mm. Please download the step model for exact numbers.

Please note that two different units are used on the figures below, SI system millimeters (mm) and imperial system thousandths of an inch(mil). To convert mils to millimeters and vice versa use formula 100mil's = 2,54mm.

Figure 3: TE0723 module physical dimensions.

Operating Temperature Ranges

Commercial grade: 0°C to +70°C.

Industrial grade: -40°C to +85°C.

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Revision History

Hardware Revision History

Table x: TE0723 hardware revision history.

Hardware revision number is printed on the PCB board together with the module model number separated by the dash.

Document Change History

Date	Revision	Contributors	Description
Error rendering macro 'page-info' Ambiguous method overloading for method jdk.proxy244.$Proxy3578#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]		Jan Kumann	Initial document.

Table x: Document change history.

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