FPGA's and SoC can be used for many more advanced functions as making a LED to blink. However "LED Blinky" is considered a "Hello World" for systems that can not otherwise say Hello.
To make LED to Blink (under user control) following requirements are needed:
If any of those requirements are missing, you will most likely fail with the simple task to get an LED to Blink.
It is very common that modern Integrated Circuits have separate power supply pins for I/O Voltage. That voltage if applied control the output levels from the device, if the Voltage is too low or missing then it is not possible to have enough current from the device I/O Pin to make a LED Lit.
FPGA and SoC SoM's can have fixed and user controlled Voltages for the I/O Banks. It is important to assure that the I/O Bank that controls the LED has a valid Supply Voltage applied.
If you are not sure about the I/O Banks Voltage supplies then there are some options to try.
If there is on board LED directly connected to FPGA "DONE" output, then it is also possible to control it as long as it is possible to configure the FPGA (or PL portion of Zynq). For Zynq the PS subsystem is not needed if configuration is done via JTAG.
If there is a LED directly connected to lower MIO Bank of the Zynq then this LED is also always controllable, as this Bank has to be powered for the device to boot. This LED can also be controlled if the PL portion of the Zynq is not configured or even un-powered.
MIO LED | DONE LED | User LED PL | Notes | |
---|---|---|---|---|
TE0710 | - | |||
TE0711 | - | |||
TE0712 | - | No* | Yes* | LED's are routed to PL I/O by System Control CPLD |
TE0714 | - | No | Yes | One fixed LED on PL,1.8V or 3.3V I/O Voltage always present |
TE0720 | MIO7 | Yes, Fixed | Yes* | System control CPLD can remap the LED functions during FSBL |
TE0725 | - | Yes | Yes | LED's power always available |
Base | User LED's | Notes | |
---|---|---|---|
TE0701 | |||
TE0703 | 2* | User supplied I/O Voltage | |