Table of contents
CPLD Device with designator U21: LCMX02-256HC
- JTAG routing
- Boot Mode settings
Firmware Revision and supported PCB Revision
See Document Change History
|Name / opt. VHD Name||Direction||Pin||Bank Power||Description||Note:|
PCB REV01 REV02 Connection
|EN1||in||27||3.3VIN||Power Enable from B2B Connector (Positive Enable) / Used only for PGOOD feedback|
|User_LED||out||4||3.3VIN||user defined or status, see LED description||1.8V input ERR_OUT(PS_ERROR_OUT)|
|N.C.||5||3.3VIN||/ currently_not_used||1.8V input ERR_STATUS as input|
|JTAGEN||in||26||3.3VIN||Enable JTAG access to CPLD for Firmware update (zero: JTAG routed to module, one: CPLD access)|
|MODE||in||25||3.3VIN||Boot Mode for Zynq/ZynqMP Devices (Flash or SD)|
|MODE0||out||12||1.8V||ZynqMP Boot Mode Pin 0|
|MODE1||out||13||1.8V||ZynqMP Boot Mode Pin 1|
|MODE2||out||14||1.8V||ZynqMP Boot Mode Pin 2|
|MODE3||out||16||1.8V||ZynqMP Boot Mode Pin 3|
|NOSEQ||inout||23||3.3VIN||usage CPLD Variant depends|
|PGOOD||out||28||3.3VIN||Module Power Good (only Feedback from EN1).|
|PHY_LED1||in||17||1.8V||ETH PHY LED1 / currently_not_used|
|X0||in||20||VCCO_65||FPGA IO (FPGA Pin H1) / Enable User LED (negative)||output Firmware variant|
|X1||in||21||VCCO_65||FPGA IO (FPGA Pin J1)/ Connect to User LED||output PHY_LED1|
JTAG signals routed directly through the CPLD to FPGA. Access between CPLD and FPGA can be multiplexed via JTAGEN (logical one for CPLD, logical zero for FPGA) on JM1-89.
Boot Modes can be selected via B2B Pin Mode. Trenz Electronic provides currently 4 Firmware variants, one for SD/JTAG, one for JTAG/QSPI, one for SD/QSPI and SD/QSPI/JTAG usage.
|low||JTAG||Boot from SD||Boot from SD||JTAG Mode, if NOSEQ* is high otherwise boot from SD|
|high||Boot from Flash||JTAG||Boot from Flash||JTAG Mode, if NOSEQ* is high otherwise boot from Flash|
For other UltraScale+ Boot Modes options custom firmware is needed, see also Table 11.1 Boot Modes from Xilinx UG1085.
A special FSBL is provided on 2017.4 or newer reference designs to write boot image to QSPI with Xilinx tools (Vivado or SDK) on Boot Mode unequal JTAG .
NOSEQ*: Please check the carrier board documentation, before using the SD/QSPI/JTAG firmware variant on TE0820. In the most cases special carrier CPLD firmware is needed.
PGOOD is EN1. There is no additional power management controlled by CPLD.
|Firmware Variant||if X0 is high (default, if FPGA is not programmed)|
|User Defined (X1)||if X0 is low|
*It's recommended to forward this signal to a carrier LED if status check is needed.
|Firmware Variant||Blink sequence||Condition|
|QSPI/JTAG||*ooooooo||if boot mode /= JTAG otherwise const. high if NOSEQ='1' or const low if NOSEQ='0'|
|JTAG/SD||**oooooo||if boot mode /= JTAG otherwise const. high if NOSEQ='1' or const low if NOSEQ='0'|
|****oooo if Boot Mod is QSPI otherwise *****ooo if NOSEQ='1' or ******** if NOSEQ='0'|
|SD/QSPI/JTAG||***ooooo||if boot mode /= JTAG otherwise const. high if NOSEQ='1' or const low if NOSEQ='0'|
Appx. A: Change History
For PCB REV01 and REV02 Documentation available on: TE0820-REV01_REV02 CPLD
- REV03 to REV04
- PCB REV03 support only
X1 is input for USER LED
X0 select X0 or Firmware Blink status to User LE
blink modes for QSPI/SD firmware
- REV02 to REV03
- new Boot Mode variants
- new X0 status blink sequencing
- REV01 to REV02
- Boot Mode variants
- Remove ERR_STATUS
Document Change History
To get content of older revision got to "Change History" of this page and select older document revision number.
|Date||Document Revision||CPLD Firmware Revision||Supported PCB Revision||Authors||Description|
|REV04||REV03|| John Hartfiel
Appx. B: Legal Notices
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Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.
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