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Board Component Descriptions

Zynq UltraScale XCZU15EG MPSoC

The TEC0850 board is populated with the Zynq UltraScale+ XCZU15EG-1FFVB1156E MPSoC.

IO Interfaces

Main IO interfaces are shown on the image below.

PS MIO Configuration

MIOInterface
MIO 0...12QSPI Flash Memory
MIO 20...21I2C 1
MIO 22...23UART 0
MIO 26...37GEM 0
MIO 46...51SD 1
MIO 52...63USB 0
MIO 64...75USB 1
MIO 76...77MDIO 0

DDR4 SODIMM Socket

The Zynq UltraScale+ DDRC hard memory controller is wired to the DDR4 SODIMM Socket U3. 


Quad-SPI Flash Memory

Board has two N25Q512A11G1240E connected in a dual parallel mode.

I2C

The onboard I2C bus is connected to MIO 20...21 pins. Devices on the bus shown in the table below.

I2C addressChipDescription
0x50U63 24AA128T-I/ST128K Serial EEPROM
0x53U64 24AA025E48T-I/OT2K Serial EEPROM with EUI-48™ or EUI-64™ Node Identity
0x69U14 Si5345Clock generator and distributor


UART and JTAG

Board has USB-UART bridge based on FTDI FT2232 chip. Use of this feature requires that USB driver is installed on your host PC. UART0 with MIO 22 .. 23 should be selected in "Zynq UltraScale+ MPSoC" configuration.

The Digilent plug-in software and cable drivers must be installed on your machine for you to be able to use JTAG interface.

Ethernet


SD



USB


DACs


MGT


Clocking

Power supply

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