You are viewing an old version of this page. View the current version.

Compare with Current View Page History

« Previous Version 5 Next »

Download PDF version of this document.

Table of Contents

Overview

The Trenz Electronic TE0xxx-xx ... is an industrial-grade ... module ... based on Xilinx ...

Refer to http://trenz.org/tec0850-info for the current online version of this manual and other available documentation.

Key Features

  • Carrier for 4x5 modules

  • LPC FMC

  • SFP+ connector
  • PCIe x1
  • SATA connector
  • RJ45 Gigabit Ethernet connector
  • micro-usb to JTAG/UART bridge
  • 2x high speed LVDS connectors
  • micro usb connector
  • micro SD card connector
  • 4x LED (2User, Power and Status)
  • Module reset button
  • 10x user dip
  • MAX10 CPLD

Block Diagram

TE... block diagram

Main Components

TE... main components
  1. ANSI/VITA 57.1 compliant FMC LPC connector, J1
  2. Cooling fan 5VDC M1 (45X5MM, 0.7W, 1.06CFM), M1
  3. SFP+ connector, J12
  4. PCIe x1 connector, J3
  5. SATA connector, J31
  6. Trenz Electronic 4 x 5 modules B2B connectors, JB1 ... JB3
  7. RJ45 Gigabit Ethernet connector, J9
  8. 2x high speed LVDS arrangement of connectors J11, J13, J14, J18
  9. Micro-USB2 connector, J10
  10. FTDI FT2232H USB2 to JTAG,UART/FIFO Bridge, U4
  11. Micro-USB2 connector, J16
  12. MAX10 10M08SAU169C8G CPLD, U11
  13. 6-pin 12V power connector, J15
  14. 6x1 JTAG pin header (not fitted)
  15. 3x1 jumper pin header (select VCCIOA), J4
  16. 3x1 jumper pin header (select VCCA_SD), J7
  17. 2x1 pin header (VBAT), J6
  18. 2x5 1,27mm pitch pin header (PJTAG), J19
  19. Push button, S1
  20. 10x dip switch, S2, S3
  21. DCDC LMZ23605TZ @5.0V (5V0PER), U15
  22. DCDC LMZ23605TZ @5.0V (5V0), U9
  23. DCDC LMZ23605TZ @3.3V(3V3IN), U10
  24. 2x green LED (user), D1, D2
  25. green LED (Power), D3
  26. green LED (Status), D4
  27. SD-Card connector (top loader),
  28. DCDC EN5335QI (FMC_VADJ), U1
  29. DCDC EN6338QI @3.3V (3V3FMC), U14
  30. SDIO Level shifter TXS02612, U3

Initial Delivery State

Storage device name

Content

Notes

FTDI chip configuration EEPROM (93AA56B), U6

Xilinx License

Do not overwrite, see warning in related section
MAX10 System Controller CPLD (10M08SAU169C8G), U14SC CPLD Firmware
Initial delivery state of programmable devices on the module.

Control Signals

To get started with TEF1002 board, some basic control signals are essential and are described in the following table:

Control signal

Switch / Button / LED / PinSignal Schematic Names

Connected to

Functionality

Notes
FMC_VADJ voltage selectionDIP switches S2-1, S2-2, S2-3VID0 ... VID2SC CPLD U11, pins K6, J5, K5sets adjustable voltage for FMC connectordependens on SC CPLD configuration
JTAG enableDIP switch S2-4JTAGENSC CPLD U11, pin E5

OFF: TEF1002 SC CPLD JTAG enabled,
ON: Module/FMC JTAG enabled

-
Module JTAG selectDIP switch S2-5

M_JTAGEN

B2B JB1, pin 90

When S2-4 ON and S2-6 OFF:

OFF: Module SC CPLD JTAG enabled,

ON: Module SOC JTAG enabled

-
FMC JTAG selectDIP switch S2-6FMC_JTAGSC CPLD U11,L3

When S2-4 ON:

OFF: TEF1002 SC CPLD JTAG enabled,

ON: FMC JTAG enabled

depends on SC CPLD configuration, only avialiable when 4x5 module installed
Enable module powerDIP switch S2-7CM0SC CPLD U11, M3Module power. Set ON to enable module power. (Power management depends on module. )depends on SC CPLD configuration, only avialiable when 4x5 module installed
No sequenzingDIP switch S2-8CM1SC CPLD U11, L2Module Power management. Set ON to disable module CPLD power management. Power management depends on module and not all modules support extended power management with CPLD.depends on SC CPLD configuration, only avialiable when 4x5 module installed
Boot ModeDIP switch S3-1CM2SC CPLD U11, K2

Boot Mode for attached module (Default: OFF for primary SD boot and ON for primary QSPI boot. Depends also on module CPLD firmware).

depends on SC CPLD configuration, only avialiable when 4x5 module installed
FMC VADJ enableDIP switch S3-2USR0SC CPLD U11, K1

ON: FMC VADJ enable also without installed FMC Card

OFF: FMC_FADJ only enabled when FMC installed.

dependens on SC CPLD configuration, only avialiable when 4x5 module installed
ResetPush button S1BUTTONSC CPLD U11, N6Module Reset, Low active module reset. Pin force Power one reset on FPGA/SoC.depends on SC CPLD configuration
2x User LEDGreen LEDs D1, D2LED1, LED2SC CPLD U11, J5, K5Depends on User configuration, curenntly both off, if not otherwise programmed.depends on SC CPLD configuration
Board power indicatorGreen LED D33V3INB2B JB1, pin 14, 16

ON: 3.3V on-board voltage available

-
Board status indicatorsGreen LED D4-SC CPLD U11, pin C2

ON: No failure. For other blinking status of this LED please refer to SC Firmware description.

dependens on SC CPLD configuration
Enable module powerSC CPLD U11, D11EN1B2B JB1, pin 27Module power.  (Power management depends on module. )-
No sequenzingSC CPLD U11, E13NOSEQB2B JB1, pin 8Power management depends on module and not all modules support extended power management with CPLD.-
Boot ModeSC CPLD U11, B11MODEB2B JB1, pin 31Boot Mode for attached module. LOW for primary SD boot and HIGH for primary QSPI boot. (Depends also on module CPLD firmware).-
Module ResetSC CPLD U11, E12RESINB2B JB2, pin 17Module Reset-
TEF1002 Control Signals

Signals, Interfaces and Pins

Board to Board (B2B) I/Os

I/O signals connected to the B2B connector: 

B2B ConnectorInterfacesI/O Signal CountNotes
JB1User IO15 single ended or 7 differentialTEF1002 CPLD


16 single ended or 8 differentialFFA


16 single ended or 8 differentialFFB

MIO/PJTAG/User IO4Pinheader J19

CPLD IO2Module CPLD IO to Carrier CPLD

SD IO6-

UART2-

GbE PHY_MDIO + PHY_COM8 +1-

Module Control5NOSEQ,, EN1, PGOOD, MODE, M_JTAGEN

JB2

User IO12 single ended or 6 differentialLPC FMC

MGTs (RX+TX)4PCIe x1, SFP+, LPC FMC, SATA

MGTCLK

1 differential-

CLK1 differential-

USB2OTG-D_P, OTG-D_N

USB Control3OTG-ID
JB3User IO56 single ended or 28 differential

LPC FMC


CLK2 differentialM2C

JTAG4-
General overview of B2B connectors

FMC LPC Connector

I/O signals and interfaces connected to the FPGA SoCs I/O bank and FMC connector J1:

FMC Connector J2 Pins and InterfacesI/O Signal CountLVDS-pairs countConnected toVCCIO voltageNotes
I/O5628B2B JB2 connectorFMC_VADJpins usable as single ended I/O's or LVDS pairs
126B2B JB3 connectorFMC_VADJ
Multi Gigabit Transceiver-2B2B JB3 connector,  pin 19, 21 and 20, 22-RX, TX
Gigabit Transceiver Clock-1B2B JB3 connector, pin 31, 33-
I²C (SDA, SCL)2-SC CPLD U11, pin F9, J83V3INFMC I²C Geographical Address pins GA0 and GA1 set to GND.
JTAG5-SC CPLD U11, pin N7, M8, F8, M7, N83V3INTDO, TMS, TCK, TDI, TRST
Clock Input-2B2B JB3 connectorFMC_VADJ2x reference clock inputs
Control Signals2-SC CPLD U11, pin M5, E93V3IN

'PG_C2M',  'FMC_PRSNT'

Reference voltage (FMC_VREF)----Not Connected.
FMC connector interface

SFP+ Interface

Connector J12 Pins and InterfacesI/O Signal CountLVDS-pairs countConnected toVCCIO voltageNotes
Multi Gigabit Transceiver-2B2B JB3 connector, pin 13, 15 and 14, 16-RX, TX
Control6
SC CPLD U113V3INTX_FAULT, TX_DIS, M-DEF0, RS0, RS1, LOS
I²C (SDA, SCL)2-SC CPLD U11, pin F9, J83V3INMUX via CPLD
SFP+ interface

PCIe x1 card edge connector

Connector J3 Pins and InterfacesI/O Signal CountLVDS-pairs countConnected toVCCIO voltageNotes
Multi Gigabit Transceiver-2B2B JB3 connector, pin 7, 9 and 8, 10-RX, TX
Clock-1B2B JB3 connector, pin 32, 34-
JTAG5-SC CPLD U11, M12, M13, L11, N12, G103V3INTDO, TMS, TCK, TDI, TRST
PCIe x1 card edge connector

SATA connector

Connector J31 Pins and InterfacesI/O Signal CountLVDS-pairs countConnected toVCCIO voltageNotes
Multi Gigabit Transceiver-2B2B JB3 connector, pin 7, 9 and 8, 10-RX, TX
SATA connector

LVDS high speed connectors FFA and FFB

There are two connector arrangements mechanical compatible to Firefly connectors, but with high speed LVDS signals.

Connector, Pins and InterfacesI/O Signal CountLVDS-pairs countConnected toVCCIO voltageNotes
FFA, J11-8B2B JB1 connector--
FFA Control, J144-SC CPLD U11, pin C10, C9, E8, B93V3INMPRS, MSEL, INTL, RSTL
FFA I2C, J142-SC CPLD U11, pin E6, D63V3IN
FFB, J11-8

B2B JB1 connector

--
FFB Control, J144-SC CPLD U11, pin A11, B10, A10, B93V3INMPRS, MSEL, INTL, RSTL
FFB I2C, J142-SC CPLD U11, pin A9, D83V3IN
FMC connector interface

The RSTL of both connectors are tied together.

microUSB JTAG/UART/FIFO Interface

The microUSB connector provides JTAG access through the carriers USB to JTAG/UART/FIFO bridge. JTAG is routed for MUX and CPLD JTAG access to the CPLD. UART signals are connected to the module B2B connectors. For further description of the JTAG MUX see Dip switches or SC CPLD Firmware.  For non-standard functionalitiers compare on-board Peripherals and datasheet of FTDI FT2232H.

microUSB

Connector J16, Pins and InterfacesI/O Signal CountLVDS-pairs countConnected toVCCIO voltageNotes
DATA-1B2B JB3 connector, pin 48, 50--
Power, Control3-B2B JB3 pin 52, 54, 56-OTG-ID, VBUS_V_EN, USB-VBUS
MicroUSB J16

RJ45 - Ethernet MagJack

Connector J9, Pins and InterfacesI/O Signal CountLVDS-pairs countConnected toVCCIO voltageNotes
PHY_MDI-4B2B JB1 connector, pin 3, 5, 9, 11, 15, 17, 21, 23--
LED12-SC CPLD U11, pin B13, C123V3INgreen/yellow
LED22
SC CPLD U11, pin D12, C133V3INgreen/yellow
Gigabit Ethernet Connector

micro SD-Card connector

The micro SD-Card connector J8 is connected to a TXS02612 SDIO port expander, which is used as levelshifter. Depending on the modules IO Voltage of the IO Bank where the SD-Card is connected Jumper J7 has to be set.

Connector J8 pinSignal Schematic Name
Muxed to signal on Port ExpanderConnected toNotes
2, DAT3

SD-D3_LS

SD_D3B2B JB1, pin 18-

3, CMD

SD-CMD_LS

SD_CMD

B2B JB1, pin 26-

5, CLK

SD-CCLK_LS

SD_CCLK

B2B JB1, pin 28-

7, DAT0

SD-D0_LS

SD_D0

B2B JB1, pin 24-

8, DAT1

SD-D1_LS

SD_D1

B2B JB1, pin 22-

1, DAT2

SD-D2_LS

SD_D2

B2B JB1, pin 20-
micro SD-Card connector

On-board Peripherals

System Controller CPLD MAX10

The Intel/Altera MAX10 10M08SAU169C8G System Controller CPLD (U11) is the central system management unit where essential control signals are logically linked by the implemented logic in CPLD firmware. It generates output signals to control the system, the on-board peripherals and the interfaces. The JTAG and I2C between the on-board peripherals and the attached module are by-passed, forwarded and controlled by the System Controller CPLD. A main tasks of the System Controller CPLD is the monitoring of the power-on sequence and configuring the state of the attached module. For detailed information, refer to the firmware documentation of the SC CPLD. Table below lists the SC CPLD I/O signals and pins:

Signal nameSC CPLD PinConnected toFunctionNotes
ACBUS0A4FTDI U4, pin 22GPIO's available to user











(FIFO or other FTDI functions when FTDI reprogrammed)











ACBUS1B4FTDI U4, pin 23
ACBUS2A5FTDI U4, pin 24
ACBUS3B5FTDI U4, pin 25
ACBUS4A6FTDI U4, pin 26
ACBUS5B6FTDI U4, pin 27
ACBUS6A7FTDI U4, pin 28
ACBUS7A8FTDI U4, pin 29
ADBUS4A2FTDI U4, pin 17
ADBUS5B2FTDI U4, pin 18
ADBUS6A3FTDI U4, pin 19
ADBUS7B3FTDI U4, pin 20
TCKG2FTDI U4, pin 12Forwarded JTAG signals from FTDI chip.



(FIFO or other FTDI functions when FTDI reprogrammed)



TDIF5FTDI U4, pin 13
TDOF6FTDI U4, pin 14
TMSG1FTDI U4, pin 15
M_TCKH5JB2, pin 1004x5 Module JTAG



Bank with VCCIO is VREF_JTAG from Module



M_TDIJ2JB2, pin 96
M_TDOJ1JB2, pin 98
M_TMSH6JB2, pin 94
FMC_TCKF8J1, pin D29FMC JTAG




TRST not used



FMC_TDIM7J1, pin D30
FMC_TDON7J1, pin D31
FMC_TMSM8J1, pin D33
FMC_TRSTN8J1, pin D34
PCIE_TCKL11J3, pin A5PCIe JTAG




Currently not used




PCIE_TDIN12J3, pin A6
PCIE_TDOM12J3, pin A7
PCIE_TMSM13J3, pin A8
PCIE_TRSTG10J3, pin B9
PCIE_PERSTF12J3, pin A11Indication that PCIe Bus is up (power, clocks)
EN_FMCL4U14, pin 9Enable switched 3.3V FMC power pulled down
EN_FMC_VADJK7U1, pin 41Enable IO power FMC_VADJpulled down
EN_PERF13Q4, pin 5Enable perepherie power 3V3_PERpulled down
FAN_FMC_ENK8Q1, pin 5Enable FMC FAN
FMC_PG_C2MM5J1, pin D1Ipulled up
FMC_PRSNT_M2C_LE9J1, pin H2Indicate if FMC installedLow when FMC present
FMC_SCLJ8J1, pin C312-wire serial bus
FMC_SDAF9J1, pin C30

PG_FMC_VADJJ6




FF_RSTLB9

FFA_INTLE8

FFA_MPRSC10


FFA_MSELC9


FFA_SCLD6


FFA_SDAE6


FFB_INTLA10


FFB_MPRSA11


FFB_MSELB10


FFB_SCLD8


FFB_SDAA9


CPLD_IO_1B12


CPLD_IO_2A12


M10_RSTD1


M10_RXE4


M10_TXE3


EN1D11


MODEB11


NOSEQE13


PGOODC11


RESINE12


M3.3VOUTM4


SFPA_LOSM10


SFPA_M-DEF0F10


SFPA_RS0N10


SFPA_RS1M11


SFPA_SCLL10


SFPA_SDAN9


SFPA_TX_DISM9


SFPA_TX_FAULTG9


VID0_FMC_VADJE10


VID1_FMC_VADJJ7


VID2_FMC_VADJL5


VID0K6


VID1N5


VID2N4


JTAGENE5


FMC_JTAGL3


CM0M3


CM1L2


CM2K2


USR0K1


USB_OCD9


BUTTONN6


LED1J5


LED2K5


PHY_LED1D12





PHY_LED1RC13

PHY_LED2B13

PHY_LED2RC12

A_00_NJ10





























A_00_PK10
A_01_NL12
A_01_PK11
A_02_NJ12
A_02_PK12
A_03_NH10
A_03_PJ9
A_04_NH13
A_04_PJ13
A_05_NH8
A_05_PH9
A_06_NG12
A_06_PG13
A_07L13
SC CPLD pin mapping

FTDI FT2232H

SDIO Port Expander

Configuration DIP-switches

Jumper

Push Button

On-board LEDs

Power and Power-On Sequence

Power Consumption

Power Distribution Dependencies

add drawIO object here: Attention if you copy from other page, objects are only linked.

Power Distribution

Power-On Sequence

Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Power Sequency

Voltage Monitor Circuit

Power Rails

Bank Voltages

Board to Board Connectors

Technical Specifications

Absolute Maximum Ratings

ParameterMinMaxUnitsReference Document










Module absolute maximum ratings.

Recommended Operating Conditions

ParameterMinMaxUnitsReference Document










Recommended Operating Conditions.

Physical Dimensions


Physical dimensions drawing

Variants Currently In Production

Trenz shop TE0xxx overview page
English pageGerman page
Trenz Electronic Shop Overview


Revision History

Hardware Revision History

DateRevisionNotePCNDocumentation Link
-01Prototypes--





Hardware Revision History

Hardware Revision Number

Hardware revision number is printed on the PCB board next to the module model number separated by the dash.

Document Change History

DateRevisionContributorDescription

Error rendering macro 'page-info'

Ambiguous method overloading for method jdk.proxy241.$Proxy3496#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]

Error rendering macro 'page-info'

Ambiguous method overloading for method jdk.proxy241.$Proxy3496#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]

Error rendering macro 'page-info'

Ambiguous method overloading for method jdk.proxy241.$Proxy3496#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]

  • change list

--

all

Error rendering macro 'page-info'

Ambiguous method overloading for method jdk.proxy241.$Proxy3496#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]

  • --
Document change history.

Disclaimer

Data Privacy

Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy

Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

Limitation of Liability

In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents. If your use of the materials or information from this document results in the need for servicing, repair or correction of equipment or data, you assume all costs thereof.

Copyright Notice

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.

Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.

REACH, RoHS and WEEE

REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.


Error rendering macro 'page-info'

Ambiguous method overloading for method jdk.proxy241.$Proxy3496#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]

  • No labels