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Requirements - EIGENTLICH ÜBERFLÜSSIG, da auf Seite 0 geschrieben... . ?!?

All steps to format / setup a bootable SD card can only be performed within a Linux,
(Windows Subsystem for Linux is not capable to format a SD card) the Linux tool fdisk / sfdisk depend on it.

The tools bsp-editor, alt-boot-disc-util and SoC EDS Command Shell are present.
An installation of INTEL SoC FPGA EMBEDDED DEVELOPMENT SUITE along with Intel Quartus Prime Lite, so the tools
bsp-editor, alt-boot-disc-util and SoC EDS Command Shell are present.

Background

The boot process of the HPS consists of several stages:

  • Boot ROM
     - Hard coded into the chip
     - It's purpose is to detect the selected boot source
     - Perform minimal Setup of the HPS
     - Load the next Boot stage [Preloader / u-boot-spl] into the On chip RAM [OCRAM]
        therefore the preloader / SPL u-boot is limited to 64 kByte on Cyclone 5 devices

  • Preloader
     - Perform additional HPS initialization
     - Bring up SDRAM
     - Load the next boot stage from Flash to SDRAM and jump to it
     - Preloader-optins:
            u-boot - SPL
            SoC EDS - MPL [Altera bare-metal libraries - HWLibs]
     - For Cyclone 5 devices, the preloader consists of 4 identical copies. each 64 kB in size,
        256 kb in total
     - When generating the preloader, it can be necessary to manually add a header and checksum
       into the binary, the tool mkpimage can perform these additions

  • Main Bootloader
     - Load Linux [u-boot] or Bare Metal Application into the RAM
     - Jump to it.
       In case of Linux, load Kernel, followed by the loading of the Linux rootfs
     - When generating the preloader, it can be necessary to manually add a header and checksum 
       into the binary, the tool mkimage can perform these additions


DIE GRAFIK GEHÖRT INTEL; DARF DIE HIER ÜBERHAUPT SEIN?---------------------------------------------------------




The steps


BSP Editor

The BSP-Editor takes the handoff folder and generates further source and configuration files to be able to compile
the U-Boot Preloader and U-Boot Bootloader for the HPS.

Like before mentioned, the SoC EDS Shell has limit access to the file system, so its the easiest solution to open a SoC EDS Shell
with administrative privileges. Use your file browser and navigate to    C:\intelFPGA\18.1\embedded\    .
Right click onto the    Embedded_Command_Shell.bat   , select Run as administrator and click onto Yes in the
window - User Account Control .

Type into the Shell    bsp-editor.exe    and press Enter. The BSP-Editor window opens.

Via    File → New HPS BSP...    open the dialogue - New BSP - , click onto the tree doted button and point in the next
window - Open - to the folder PlatformEditorHPS_hps_0 inside your handoff folder, locate inside your project folder.
Press open, the window closes and then press OK, the dialogue closes.

Back in the BSP-Editor, the U-Boot preloader must be configured. In the right column, under spl.boot are four Checkboxes,
each beginning with BOOT_FROM_... check only BOOT_FROM_SDMMC , the following three lines are of no interest.

check FAT_SUPPORT , FAT_BOOT_PARTITION: must contain a 1 and FAT_LOAD_PAYLOAD_NAME: must contain u-boot.img .

Hit the button Generate in the bottom right corner, after processing, in the bottom tab Information
Finished generation BSP files. Total time taken = x seconds is visible.

In your project folder, the folder - software - appears.

 


U-Boot - Make preloader and main bootloader



Mit der Soc EDS shell zum Projekt navigieren -> z.b. Projekt\software\spl_bsp
dort das kommando
[make clean] cd
make UNTER DER PFADANGABE “/usr/bin/make” ausführen (rpeloader in spl_bsp/preloader....bin)
und
make uboot ausführen.
[Alternativer workaround zu /usr/bin/make ist export PATH=/bin:$PATH, funzt nicht richtig]

make erzeugt den preloader und vorher legt es die Uboot Sourcen im Verzeichniss ab
make uboot erzeugt den main Bosotloader



Infos über uboot

Uboot induvidialisieren:
Allgemeine config - socfpga_common.h - unter: ProjekOrdner\software\spl_bsp\uboot-socfpga\include\configs
Z154 - #define CONFIG_BOOTDELAY 5
Ab Z181 - Variablen
Ab Z298 - MMC Uart ... Einstellungen

Spezielle Config - socfpga_cyclone5.h - unter: Projektordner\software\spl_bsp\uboot-socfpga\include\configs



The handoff folder contains now after the previous steps all the sources to compile the booot loaders.

On Windows 10 - Version 1909 - and cygwin - Version 2.0 - all commands which require decompressing of source archives, have to be
pointed into the right folder to be executed from, these commands beginn with    /usr/bin/ . All commands are in italic and bold.

First, the softwarefolder needs to be setup, therefore navigate to it by typing into the prior opened SoC EDS Shell with
administrative privileges
cd c:
followed by
cd Project/software/spl_bsp
and run two setup commands
/usr/bin/make clean
/usr/bin/make config


cygwin x86_64 version 2.0.0 - Built with make version 3.81

Win 10 Pro Version 1909

navigate to C:\intelFPGA\18.1\embedded open as admin Embedded_Command_Shell.bat (Linux sh)

cd C:/temp/Project/


/usr/bin/make clean

/usr/bin/make config  – places folder:     uboot-socfpga into softwae/spl_bsp

/usr/bin/make  –  Places the file:     preloader-mkpimage.bin into softwae/spl_bsp

make uboot     – Places u-boot.img into into softwae/spl_bsp/uboot-socfpga


C:\temp\Project\software\spl_bsp


Device Tree Blob


Generate - ... .dtb file from ... .sopcinfo file

Linux requires a DTB file to start the Kernel properly

DTB informs the Linux Kernel about the existing Hardware, its Configuration and which driver to use


Decompile - ... .dtb to ... .dts




Generate - ... .dts file to ... .dtb file





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