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Table of Contents

TEBF0808 with TE080x

Overview

Basic instructions to work with TEBF0808 and TE0808,TE0807 or TE0803.

Functionality of buttons, DIP switches, LEDs depends on CPLD Firmware. Following description is only for newest firmware version, which is available on the download area


Board Overview
NumberNote
LetterNote
1S2- Reset Button
A

P1 - PMOD 3.3V I2C Bus

2D7 - LED D7 Red (Usage: status) || D6 - LED Green (Usage: status)
BJ9 - Audio Enclosure
3S1 - Power Button
CJ26 - FAN1 12V
4J25 - Power Jack J25, 2.1mm (optional 12V power input)
DJ17 - I2C (for optional module PLL access)
5S5 - DIP Switch for Boot Mode and FMCVADJ
EJ6/15 - Firefly - GTH
6J10 - Enclosure Pin header(Reset and Power Button, HD LED (Usage: status/user) and Power LED (Usage: status/user))
F

J31 - SATA

7S4 - DIP Switch for CPLD access and power control
GJ21/22 - Firefly - loopback only
8J12 - XMOD with green dot for Module JTAG and UART, XMOD LED D4 Red used  for status information
HP3 - PMOD 3.3V I2C Bus
9J28  - XMOD for CPLD,FMC JTAG and Firmware ID over UART(need CPLD Firmware 7 or newer) , XMOD LED D4 Red used for status information
IJ34 - I2C Firefly
10FPGA Done LED (location varies slightly on different module series )
JJ35 - FAN2 12V
11J20  - ATX Power Connector (Main 12V and 5V Power supply), recommended power supply connector
KJ11 - PCIe (1x)
12D1 - SFP LED Red (Usage: status/user)
LB1 - Battery holder CR1220
13D8 - SFP LED Green (Usage: status/user)
MJ30 - PJTAG
14D9 - SFP LED Red (Usage: status/user)
NJ29 - CAN (same as J24)
15D10  - SFP LED Green (Usage: status/user)
OJ5 -  FMC HPC
16J7 - ETH LED Yellow (Usage: status)
PJ19 - FAN3 5V
17J7 - ETH LED Green/Orange (Usage: status)
QJ24 - CAN (same as J29)
18D4 - LED Green (Usage: status/user) || D5 - LED Red (Usage: status/user)
RJ27 - SD
------
SJ8 - USB 3.0 (2x) Enclosure
------
TJ14 - SFP (2x)
------
UJ7 - USB 3.0 (2x), ETH (1x)
------
VJ13 - Displayport (1x)
------
WP2 - PMOD 3.3V FPG IOs
------
W(b)Bottom side: J16 - microSD

Power supply

LabelDesignatorPowerDescription
Overview - 11J2012V and 5VRecommended power supply unit is PC power supply unit:
  • DIP S4-4 can be switched OFF with this power supply configuration (CPLD firmware depended)
Overview - 4J2512VOptional single 12V power supply:
  • DIP S4-4 must be switched ON with this power supply

Current depends manly on design and cooling solution.  Use Xilinx Power Estimator and/or Your Vivado Project to estimate min current.  Minimum of 3A are recommanded for basic functionality.

DIP-Switches and Push Buttons

Overview 7DefaultDescription
S4-1OFFSoC PUDC, ON (low - internal FPGA pull ups enabled), OFF (high - internal FPGA pull ups disabled)
S4-2OFFN.C.
S4-3OFFJTAGEN  ON (CPLD access), OFF (FMC access)
S4-4ONEnable on board 5V permanently
DIP Switches S4


Overview 5DefaultDescription
S5-1ON
  • ON(1), ON(2) - Default, boot from SD/microSD or SPI Flash if no SD is detected
  • OFF(1), ON(2) - Boot from eMMC
  • ON(1), OFF(2) - Boot mode  PJTAG0
  • OFF(1), ON(2) -Boot mode main  JTAG
S5-2ON
S5-3OFFUser Input to SoC over RGPIO interface
S5-4OFFVADJ OFF(1.8V), ON(1.2V)
DIP Switches S5 (CPLD Firmware depended)


Overview 1;3DefaultDescription
S1High

Negative Reset Button, alternative Enclosure over J10-7/J10-5

  • Press appr. 1sec for PS Soft Reset
  • Press appr 3 sec for PS POR Reset
S2High

Negative Power Button, alternative Enclosure over J10-6/J10-8

  • Press appr. 1sec for PS Soft Reset
  • Press appr 3 sec for PS POR Reset
Buttons (CPLD Firmware depended)

LEDs

LEDs used different Blink Sequence to indicate all state:

Blink SequenceFrequenceNote
******** (slow blinking)~0,7 Hzcontinuous blinking, like SFP LEDs or Enclosure HD LED when board is powered down
******** (fast blinking)~5,8 Hzcontinuous blinking, like D6 LED or Enclosure Power LED when board is powered down
*****ooo~0,7 Hz, duty cycle 5/85 times fast blink with a break
****oooo~0,7 Hz, duty cycle 4/84 times fast blink with a break
***ooooo~0,7 Hz, duty cycle 3/83 times fast blink with a break
**oooooo~0,7 Hz, duty cycle 2/82 times fast blink with a break
*ooooooo~0,7 Hz, duty cycle 1/81 times fast blink with a break
ON---LED ON
OFF---LED OFF
LED Sequencing (CPLD Firmware depended)


LabelDesignatorColorUsageDescription
Overview - 2D7Redstatus
PriorityDescriptionBlink sequencing
1PS POR Reset pressed long time (or whole system is powered off)ON
2PS Soft Reset pressed short timeOFF
3SD Boot*ooooooo
4QSPI Boot**oooooo
5eMMC Boot***ooooo
6PJTAG Boot****oooo
7JTAG Boot*****ooo
8Error******** (fast blinking)
Overview - 2D6Greenstatus
PriorityDescriptionBlink sequencing
1Power OFF******** (fast blinking)
2PG_LPD low*****ooo
3PG_FPD low****oooo
4PG_PL low***ooooo
5PG_DDR low or PG_PSGT low or PG_PLL low or PG_GT_L low or PG_GT_R low**oooooo
6POK_1V8 low or POK_FMC low or perihpery_pg low or (Main Power State Machine Ready and FMC Sanity check low)*ooooooo
7Main Power State Machine ReadyOFF
8ERROR some power failed, see XMOD LEDsON
Overview - 6J10 Power LEDBlue (symbol light bulb)status/user
PriorityDescriptionBlink sequencing
1power button pressed long time forced power down******** (fast blinking)
2

Main Power State Machine Idle and Power of State

******** (slow blinking)
3power button pressed short time power to power on/off*****ooo
4PS reset button pressed long time****oooo
5PS reset button pressed short time***ooooo
6power down sequencing is running**oooooo
7whole system hold into reset*ooooooo
8MIO40User Defined
Overview - 6J10 HD LED

Red (symbol drive)

status/user
PriorityDescriptionBlink sequencing
1PS Init is low******** (fast blinking)
2PS Error High*****ooo
3PS Error Status High****oooo
4SOC Done  low***ooooo
5SC0User Defined
Overview - 8XMOD1 D4Redstatus
PriorityXMOD ButtonDescriptionBlink sequencing
1PressedMain Power State Machine Ready, but FMC Sanity check failed******** (fast blinking)
2PressedPS State Machine PS LPD ON/OFF*ooooooo
3PressedPS State Machine PS FPD ON/OFF**oooooo
4PressedPS State Machine PS DDR,GT,PLL ON/OFF***ooooo
5PressedPL State Machine PL and PL GT ON/OFF****oooo
6PressedPS Init lowON
1UnpressedMain Power State Machine ATX ON/OFF*ooooooo
2UnpressedMain Power State Machine 5V ON/OFF**oooooo
3UnpressedMain Power State Machine Module ON/OFF***ooooo
4UnpressedMain Power State Machine 1.8V ON/OFF****oooo
5UnpressedMain Power State Machine 3.3V and VADJ ON/OFF*****ooo
6UnpressedMain Power State Machine Wait Ready ON/OFF******** (fast blinking)
7UnpressedPS Init lowON
xPressed/Unpressedall fineOFF
Overview - 9XMOD2 D4Redstatus/user
PriorityDescriptionBlink sequencing
1Power On Reset********  (slow blinking)
2PS Init low******** (fast blinking)
3SC17User Defined
Overview - 12SFP D1Redstatus/user
PriorityDescriptionBlink sequencing
1Power On Reset******** (slow blinking)
2PS Init low******** (fast blinking)
3RGPIO(0), when RGPIO Enabled over FPGAUser Defined
4--OFF
Overview - 13SFP D8Greenstatus/user
PriorityDescriptionBlink sequencing
1Power On Reset******** (slow blinking)
2PS Init low******** (fast blinking)
3RGPIO(1), when RGPIO Enabled over FPGAUser Defined
4--OFF
Overview - 14SFP D9Redstatus/user
PriorityDescriptionBlink sequencing
1Power On Reset******** (slow blinking)
2PS Init low******** (fast blinking)
3RGPIO(2), when RGPIO Enabled over FPGAUser Defined
4--OFF
Overview - 15SFP D10Greenstatus/user
PriorityDescriptionBlink sequencing
1Power On Reset******** (slow blinking)
2PS Init low******** (fast blinking)
3RGPIO(3), when RGPIO Enabled over FPGAUser Defined
4--OFF
Overview - 16ETH J7Yellowstatus
PriorityDescriptionBlink sequencing
1Power On Reset******** (slow blinking)
2PS Init low******** (fast blinking)
3ETH PHY LED(not PHY_LED0)
Overview - 17ETH J7Green/Orangestatus
PriorityDescriptionBlink sequencing
1Power On Reset******** (slow blinking)
2PS Init low******** (fast blinking)
3ETH PHY LED(PHY_LED1)
Overview - 18D4Greenstatus/user
PriorityDescriptionBlink sequencing
11.8V disabled, inter CPLD RGPIO is disabled******** (fast blinking)
21.8V enabled, inter CPLD RGPIO is disabled*****ooo
3Power On Reset****oooo
4USB Reset***ooooo
5RGPIO(4), when RGPIO Enabled over FPGAUser Defined
6all fine*ooooooo
Overview - 18D5Redstatus/user
PriorityDescriptionBlink sequencing
11.8V disabled, inter CPLD RGPIO is disabled******** (fast blinking)
21.8V enabled, inter CPLD RGPIO is disabled*****ooo
3Power On Reset****oooo
4PCie Reset***ooooo
5RGPIO(4), when RGPIO Enabled over FPGAUser Defined
6all fine*ooooooo
Carrier LEDs (CPLD Firmware depended)


LabelDesignatorColorConnected toDescription
Overview - 10D1RedDONE signal (PS Configuration Bank 503)

This LED goes ON when power has been applied to the module and stays ON until MPSoC's programmable logic is configured properly.

Module LEDs

JTAG/UART

There are 2 JTAG programmer on the carrier:

LabelDesignatorDescription
Overview - 8J12
  • SoC JTAG/UART over USB, UART Speed depends on design, normally 115200
  • XMOD with Xilinx Licence (green dot)
Overview - 9J28
  • CPLD or FMC JTAG over USB
  • XMOD without Xilinx Licence
  • Press Button to see Firmware ID over UART (need CPLD Firmware 7 or newer), UART Speed 115200


DIP Switch on bouth XMOD JTAG adapters must be set like on the following table.

XMOD DIP SwitchSetting
1ON
2OFF
3OFF
4OFF
XMOD JTAG DIP Switch. Attention: Never changes the default setting

For more information refer to TE0790.

CPLD Firmware

Firmware Update Instruction  and CPLD description are available on TEBF0808 CPLD Firmware. Source code of the firmware is available on the download area of the TEBF0808.


Firmware Versions and some statistics can be displayed over second XMOD:

  • Included since CPLD Firmware Update to REV07
  • UART Speed is 115200
  • Press XMOD Button to see output, otherwise RX/TX are loop backed

CPLD Firmware ID

TypeDescription
TE0808-x_CPLD-REV07CPLD Firmware Version
MP
  • Main Power State, Note: Only correct, if 1.8V is powered on
  • First Number indicates 1.8V Power state(1-ON)
  • Second Number indicates Main State Machine:
    • 0:IDLE (Power OFF)
    • 1:ATX ON/OFF
    • 2:V5 ON/OFF
    • 3:Module Power ON/OFF → (Different domains over LED visible)
    • 4:1.8V ON/OFF
    • 5:Periphery ON/OFF
    • 6: Wait Ready (Power Ok, SoC on Reset)
    • 7. Ready (Power/SoC OK)
PIN
  • PS Init, when Power Reset released
  • First Number current PS-INIT (Inverted)
  • Second Number PSINIT counter
PEE
  • PS ERROR, when Power Reset released
  • First Number current PS-ERROR
  • Second Number ERROR counter
PES
  • PS ERROR Status, when Power Reset released
  • First Number current PS-ERROR Status
  • Second Number ERROR Status counter
PSR
  • PS Soft  Reset(also high, PS Power On Rese is active)
  • First Number current PS-Soft Reset
  • Second Number PS-Soft Reset counter
PHR
  • PS Power On Reset
  • First Number current PS- Power On Reset
  • Second Number PS- Power On Reset counter
POR
  • Main Power On Reset
  • First Number current Main- Power On Reset
  • Second Number Main Power On Reset counter
USB
  • USB Reset
  • First Number current USB Reset
  • Second Number USB reset counter
PCI
  • PCIe Reset
  • First Number current PCIe Reset
  • Second Number PCIe reset counter
CPLD Firmware and Statistic over UART

Reference Designs

Link to different Reference Designs (Descriptions and Download)


It's recommended to use prebuilt Boot.bin and image.ub of newest Starterkit Reference Design for first test. Basic Steps:

  1. Power Supply over ATX, optional 12V power jack
  2. Download Reference Design
  3. Copy Boot.bin and image.ub on SD 
  4. Connect USB to XMOD with Green Dot
  5. Open Putty
  6. Set Boot Mode to SD, set DIP S5-1 and S5-2 to ON (Overview 5) and inserted SD with Design on SD Slot (Overview R)
  7. Press Power Button on Enclosure or on Carrier (Overview 3)
  8. For more detailed check Reference Design description


Notes

Module and Carrier are also as starter kit available:

Links to all documentation and download resources:


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