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Trenz Electronic Documentation
All SoMs and FPGA Modules
3.5 x 7.3 SoM Documentation
TE0725
Jira links
TE0725 Reference Designs
Created by
John Hartfiel
, last modified by
Waldemar Hanemann
on
03 07, 2024
Description for the newest Design Version
TE0725 Test Board
Vivado/Vitis 2023.2
MicroBlaze
QSPI
I2C
UART
HyperRAM IP - OpenHBMC (Beta)
TE0725 HyperRAM
Vivado/Vitis 2021.2
MicroBlaze
QSPI
I2C
UART
HyperRAM
S/Labs HBMC IP (Free Trail IP)
For TE0725 modules without HyperRAM, there is the 2021.2 design
TE0725 Test Board 2021.2 Hello World Example
Basic Documentation and Notes
AMD Development Tools
TE Board Part Files
TE Board Part Installation Options
PetaLinux KICKstart
TE Reference Design - Project Delivery
Download
TE0725 Reference Designs
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